From mboxrd@z Thu Jan  1 00:00:00 1970
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Date: Tue, 30 Aug 2016 11:49:52 -0700
From: Stephen Boyd <sboyd@codeaurora.org>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Simon Horman <horms@verge.net.au>,
	Magnus Damm <magnus.damm@gmail.com>, linux-clk@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org
Subject: Re: [git pull] clk: renesas: Updates for v4.9 (take two)
Message-ID: <20160830184952.GC12510@codeaurora.org>
References: <1472569013-3003-1-git-send-email-geert+renesas@glider.be>
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On 08/30, Geert Uytterhoeven wrote:
> 	Hi Mike, Stephen,
> 
> The following changes since commit b51d5275016c6edbf4656eaee30d836fef127016:
> 
>   clk: renesas: r8a7796: Add watchdog module clock (2016-08-09 09:53:47 +0200)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git tags/clk-renesas-for-v4.9-tag2
> 
> for you to fetch changes up to 074969813350cda4c624a585489cc1b3550414bc:
> 
>   clk: renesas: r8a7796: Add SDIF clocks (2016-08-23 10:30:41 +0200)
> 
> ----------------------------------------------------------------
> clk: renesas: r8a7796: Add SDHI clocks
> 
> Add all clocks needed to use the SDHI interfaces on the Renesas R-Car M3-W
> (r8a7796) SoC.
> 

Thanks. Pulled into clk-next.

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