From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
qemu-ppc@nongnu.org, Alexander Graf <agraf@suse.de>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 3/3] ppc/pnv: add a PowerNVCPUCore object
Date: Mon, 5 Sep 2016 11:45:05 +1000 [thread overview]
Message-ID: <20160905014505.GD2587@voom.fritz.box> (raw)
In-Reply-To: <168c7ae5-588d-23c6-7e51-79299c06431f@kaod.org>
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On Tue, Aug 30, 2016 at 09:23:40AM +0200, Cédric Le Goater wrote:
> On 08/30/2016 08:15 AM, Benjamin Herrenschmidt wrote:
> > On Mon, 2016-08-29 at 10:30 -0400, David Gibson wrote:
> >>
> >> Possibly. In fact, I'm planning to eliminate cpu->cpu_dt_id at some
> >> point, in favour of having the machine type construct the id when it
> >> actually builds the dt. It's not really a cpu level construct.
>
> >From my understanding, cs->cpu_index is becoming the main CPU identifier.
> sPAPRCPUCore assigns it :
>
> cs->cpu_index = cc->core_id + i
Uh.. yes and no. It's the main internal identifier, and it's become
stable at least on platforms which support cpu hotplug. This means
that it should be possible to derive any other platform specific
identifiers from cpu_index in a consistent way.
However, cpu_index values must still lie in the range 0..max_cpus-1,
which means it's not suitable for directly representing non-contiguous
platform identifiers.
> which I reused in PnvCPUCore to hold the real HW identifiers.
> ppc_get_vcpu_by_dt_id() can also safely use cs->cpu_index I think.
Well, there's a different function for getting a cpu by cpu_index.
> So pnv mostly work without ->cpu_dt_id but there is :
>
> > On PowerNV it is as it's equal to the PIR, the HW interrupt server,
> > etc...
>
> xics in the way ... Now that pnv uses real hw core ids, it is
> interesting to see how lost it gets without a cpu with index=0 ...
>
> The most obvious issue is the way we look for the ICPState of a cpu :
>
> ICPState *ss = &xics->ss[cs->cpu_index];
>
> how about introducing a helper like (this one I hacked) :
>
> +ICPState *xics_find_icp(XICSState *xics, int cpu_index)
> +{
> + int i;
> +
> + for (i = 0 ; i < xics->nr_servers; i++) {
> + ICPState *ss = &xics->ss[i];
> + if (ss->cs && ss->cs->cpu_index == cpu_index)
> + return ss;
> + }
> +
> + return NULL;
> +}
That's probably reasonable.
> +
>
> That might have been already discussed on the mailing list ?
>
> Thanks,
>
> C.
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2016-09-05 2:12 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-05 9:15 [Qemu-devel] [PATCH 0/3] ppc/pnc: add a minimal platform Cédric Le Goater
2016-08-05 9:15 ` [Qemu-devel] [PATCH 1/3] ppc/pnv: add skeleton PowerNV platform Cédric Le Goater
2016-08-16 2:12 ` David Gibson
2016-08-26 14:47 ` Cédric Le Goater
2016-08-26 22:48 ` Benjamin Herrenschmidt
2016-08-29 14:17 ` David Gibson
2016-08-29 14:16 ` David Gibson
2016-08-05 9:15 ` [Qemu-devel] [PATCH 2/3] ppc/pnv: add a PnvChip object Cédric Le Goater
2016-08-05 9:44 ` Benjamin Herrenschmidt
2016-08-05 16:48 ` Cédric Le Goater
2016-08-05 22:43 ` Benjamin Herrenschmidt
2016-08-16 2:18 ` David Gibson
2016-08-16 2:21 ` David Gibson
2016-08-26 16:31 ` Cédric Le Goater
2016-08-05 9:15 ` [Qemu-devel] [PATCH 3/3] ppc/pnv: add a PowerNVCPUCore object Cédric Le Goater
2016-08-16 2:39 ` David Gibson
2016-08-16 5:02 ` Benjamin Herrenschmidt
2016-08-26 17:55 ` Cédric Le Goater
2016-08-26 17:49 ` Cédric Le Goater
2016-08-29 14:30 ` David Gibson
2016-08-30 6:15 ` Benjamin Herrenschmidt
2016-08-30 6:28 ` David Gibson
2016-08-31 1:06 ` Benjamin Herrenschmidt
2016-08-30 7:23 ` Cédric Le Goater
2016-09-05 1:45 ` David Gibson [this message]
2016-09-06 7:45 ` Cédric Le Goater
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