From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoffer Dall Subject: Re: [PATCH] arm/arm64: KVM: Add support for ARMv8 AArch32 execution state Date: Fri, 23 Sep 2016 11:25:50 +0200 Message-ID: <20160923092550.GG9101@cbox> References: <1474614805-18629-1-git-send-email-b18965@freescale.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id A152A41267 for ; Fri, 23 Sep 2016 05:16:32 -0400 (EDT) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aNeUajNIMOuw for ; Fri, 23 Sep 2016 05:16:31 -0400 (EDT) Received: from mail-wm0-f52.google.com (mail-wm0-f52.google.com [74.125.82.52]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 7AE8F40B58 for ; Fri, 23 Sep 2016 05:16:31 -0400 (EDT) Received: by mail-wm0-f52.google.com with SMTP id b130so18859728wmc.0 for ; Fri, 23 Sep 2016 02:25:42 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1474614805-18629-1-git-send-email-b18965@freescale.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Alison Wang Cc: jason.jin@nxp.com, kvm@vger.kernel.org, marc.zyngier@arm.com, alison.wang@nxp.com, linux@armlinux.org.uk, linux-kernel@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: kvmarm@lists.cs.columbia.edu On Fri, Sep 23, 2016 at 03:13:25PM +0800, Alison Wang wrote: > The ARMv8 architecture supports two execution state, AArch64 and > AArch32. To support KVM in AArch32 execution state for ARMv8, Cortex-A53 > and Cortex-A72 need to be added for target-specific checks. > > Signed-off-by: Alison Wang > --- > arch/arm/include/asm/cputype.h | 2 ++ > arch/arm/kvm/guest.c | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h > index 754f86f..4f8c632 100644 > --- a/arch/arm/include/asm/cputype.h > +++ b/arch/arm/include/asm/cputype.h > @@ -75,6 +75,8 @@ > #define ARM_CPU_PART_CORTEX_A12 0x4100c0d0 > #define ARM_CPU_PART_CORTEX_A17 0x4100c0e0 > #define ARM_CPU_PART_CORTEX_A15 0x4100c0f0 > +#define ARM_CPU_PART_CORTEX_A53_AARCH32 0x4100d030 > +#define ARM_CPU_PART_CORTEX_A72_AARCH32 0x4100d080 > #define ARM_CPU_PART_MASK 0xff00fff0 > > /* DEC implemented cores */ > diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c > index 9aca920..462a099 100644 > --- a/arch/arm/kvm/guest.c > +++ b/arch/arm/kvm/guest.c > @@ -252,6 +252,8 @@ int __attribute_const__ kvm_target_cpu(void) > { > switch (read_cpuid_part()) { > case ARM_CPU_PART_CORTEX_A7: > + case ARM_CPU_PART_CORTEX_A53_AARCH32: > + case ARM_CPU_PART_CORTEX_A72_AARCH32: huh? why are we mapping A53 and A72 cores to an A7 core? -Christoffer From mboxrd@z Thu Jan 1 00:00:00 1970 From: christoffer.dall@linaro.org (Christoffer Dall) Date: Fri, 23 Sep 2016 11:25:50 +0200 Subject: [PATCH] arm/arm64: KVM: Add support for ARMv8 AArch32 execution state In-Reply-To: <1474614805-18629-1-git-send-email-b18965@freescale.com> References: <1474614805-18629-1-git-send-email-b18965@freescale.com> Message-ID: <20160923092550.GG9101@cbox> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Sep 23, 2016 at 03:13:25PM +0800, Alison Wang wrote: > The ARMv8 architecture supports two execution state, AArch64 and > AArch32. To support KVM in AArch32 execution state for ARMv8, Cortex-A53 > and Cortex-A72 need to be added for target-specific checks. > > Signed-off-by: Alison Wang > --- > arch/arm/include/asm/cputype.h | 2 ++ > arch/arm/kvm/guest.c | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h > index 754f86f..4f8c632 100644 > --- a/arch/arm/include/asm/cputype.h > +++ b/arch/arm/include/asm/cputype.h > @@ -75,6 +75,8 @@ > #define ARM_CPU_PART_CORTEX_A12 0x4100c0d0 > #define ARM_CPU_PART_CORTEX_A17 0x4100c0e0 > #define ARM_CPU_PART_CORTEX_A15 0x4100c0f0 > +#define ARM_CPU_PART_CORTEX_A53_AARCH32 0x4100d030 > +#define ARM_CPU_PART_CORTEX_A72_AARCH32 0x4100d080 > #define ARM_CPU_PART_MASK 0xff00fff0 > > /* DEC implemented cores */ > diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c > index 9aca920..462a099 100644 > --- a/arch/arm/kvm/guest.c > +++ b/arch/arm/kvm/guest.c > @@ -252,6 +252,8 @@ int __attribute_const__ kvm_target_cpu(void) > { > switch (read_cpuid_part()) { > case ARM_CPU_PART_CORTEX_A7: > + case ARM_CPU_PART_CORTEX_A53_AARCH32: > + case ARM_CPU_PART_CORTEX_A72_AARCH32: huh? why are we mapping A53 and A72 cores to an A7 core? -Christoffer From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758911AbcIWJZp (ORCPT ); Fri, 23 Sep 2016 05:25:45 -0400 Received: from mail-wm0-f42.google.com ([74.125.82.42]:35794 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758410AbcIWJZm (ORCPT ); Fri, 23 Sep 2016 05:25:42 -0400 Date: Fri, 23 Sep 2016 11:25:50 +0200 From: Christoffer Dall To: Alison Wang Cc: marc.zyngier@arm.com, rkrcmar@redhat.com, linux@armlinux.org.uk, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, jason.jin@nxp.com, alison.wang@nxp.com Subject: Re: [PATCH] arm/arm64: KVM: Add support for ARMv8 AArch32 execution state Message-ID: <20160923092550.GG9101@cbox> References: <1474614805-18629-1-git-send-email-b18965@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1474614805-18629-1-git-send-email-b18965@freescale.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 23, 2016 at 03:13:25PM +0800, Alison Wang wrote: > The ARMv8 architecture supports two execution state, AArch64 and > AArch32. To support KVM in AArch32 execution state for ARMv8, Cortex-A53 > and Cortex-A72 need to be added for target-specific checks. > > Signed-off-by: Alison Wang > --- > arch/arm/include/asm/cputype.h | 2 ++ > arch/arm/kvm/guest.c | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h > index 754f86f..4f8c632 100644 > --- a/arch/arm/include/asm/cputype.h > +++ b/arch/arm/include/asm/cputype.h > @@ -75,6 +75,8 @@ > #define ARM_CPU_PART_CORTEX_A12 0x4100c0d0 > #define ARM_CPU_PART_CORTEX_A17 0x4100c0e0 > #define ARM_CPU_PART_CORTEX_A15 0x4100c0f0 > +#define ARM_CPU_PART_CORTEX_A53_AARCH32 0x4100d030 > +#define ARM_CPU_PART_CORTEX_A72_AARCH32 0x4100d080 > #define ARM_CPU_PART_MASK 0xff00fff0 > > /* DEC implemented cores */ > diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c > index 9aca920..462a099 100644 > --- a/arch/arm/kvm/guest.c > +++ b/arch/arm/kvm/guest.c > @@ -252,6 +252,8 @@ int __attribute_const__ kvm_target_cpu(void) > { > switch (read_cpuid_part()) { > case ARM_CPU_PART_CORTEX_A7: > + case ARM_CPU_PART_CORTEX_A53_AARCH32: > + case ARM_CPU_PART_CORTEX_A72_AARCH32: huh? why are we mapping A53 and A72 cores to an A7 core? -Christoffer