From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Phidias Chiang <phidias.chiang@canonical.com>,
Anisse Astier <anisse@astier.eu>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
Yu C Chen <yu.c.chen@intel.com>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 2/3] pinctrl: cherryview: Do not add all southwest and north GPIOs to IRQ domain
Date: Fri, 23 Sep 2016 21:04:43 +0300 [thread overview]
Message-ID: <20160923180443.GT1218@lahna.fi.intel.com> (raw)
In-Reply-To: <CACRpkdZGFgML2-aKQ_j4xQAoec3AJ+6k17FnXzh+EMp_uXHi7g@mail.gmail.com>
On Fri, Sep 23, 2016 at 02:58:47PM +0200, Linus Walleij wrote:
> On Tue, Sep 20, 2016 at 2:15 PM, Mika Westerberg
> <mika.westerberg@linux.intel.com> wrote:
>
> > It turns out that for north and southwest communities, they can only
> > generate GPIO interrupts for lower 8 interrupts (IntSel value). The upper
> > part (8-15) can only generate GPEs (General Purpose Events).
> >
> > Now the reason why EC events such as pressing hotkeys does not work if we
> > mask all the interrupts is that in order to generate either interrupts or
> > GPEs the INTMASK register must have that particular interrupt unmasked. In
> > case of GPEs the CPU does not trigger normal interrupt (and thus the GPIO
> > driver does not see it) but instead it causes SCI (System Control
> > Interrupt) to be triggered with the GPE in question set.
> >
> > To make this all work as expected we only add those GPIOs to the IRQ domain
> > that can actually generate interrupts (IntSel value 0-7) and skip others.
> >
> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
>
> Patch applied, had to merge in the recent fix from -rc6 first but
> after that it applied cleanly. Check the result please!
Looks good, thanks.
next prev parent reply other threads:[~2016-09-23 18:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-20 12:15 [PATCH v3 0/3] gpio / pinctrl: cherryview: Fix missing events from EC Mika Westerberg
2016-09-20 12:15 ` [PATCH v3 1/3] gpiolib: Make it possible to exclude GPIOs from IRQ domain Mika Westerberg
2016-09-23 12:47 ` Linus Walleij
2016-09-20 12:15 ` [PATCH v3 2/3] pinctrl: cherryview: Do not add all southwest and north GPIOs to " Mika Westerberg
2016-09-23 12:58 ` Linus Walleij
2016-09-23 18:04 ` Mika Westerberg [this message]
2016-09-20 12:15 ` [PATCH v3 3/3] pinctrl: cherryview: Convert to use devm_gpiochip_add_data() Mika Westerberg
2016-09-23 13:00 ` Linus Walleij
2016-10-11 6:23 ` [PATCH v3 0/3] gpio / pinctrl: cherryview: Fix missing events from EC Phidias Chiang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160923180443.GT1218@lahna.fi.intel.com \
--to=mika.westerberg@linux.intel.com \
--cc=anisse@astier.eu \
--cc=heikki.krogerus@linux.intel.com \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=marc.zyngier@arm.com \
--cc=phidias.chiang@canonical.com \
--cc=tglx@linutronix.de \
--cc=yu.c.chen@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.