Re: [Qemu-devel] [PATCH 2/5] apic: add send_msi() to APICCommonClass

["Radim Krčmář" <rkrcmar@redhat.com>]

2016-09-26 14:38+0200, Igor Mammedov:
> On Thu, 22 Sep 2016 23:04:29 +0200
> Radim Krčmář <rkrcmar@redhat.com> wrote:
> 
>> The MMIO based interface to APIC doesn't work well with MSIs that have
>> upper address bits set (remapped x2APIC MSIs).  A specialized interface
>> is a quick and dirty way to avoid the shortcoming.
>> 
>> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
>> ---
>>  hw/i386/kvm/apic.c              | 19 +++++++++++++------
>>  hw/i386/xen/xen_apic.c          |  6 ++++++
>>  hw/intc/apic.c                  |  6 ++++++
>>  include/hw/i386/apic_internal.h |  4 ++++
>>  4 files changed, 29 insertions(+), 6 deletions(-)
>> 
>> diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
>> index feb00024f20c..7cc1acd63d32 100644
>> --- a/hw/i386/kvm/apic.c
>> +++ b/hw/i386/kvm/apic.c
>> @@ -168,6 +168,17 @@ static void kvm_apic_external_nmi(APICCommonState *s)
>>      run_on_cpu(CPU(s->cpu), do_inject_external_nmi, s);
>>  }
>>  
>> +static void kvm_send_msi(MSIMessage *msg)
>> +{
>> +    int ret;
>> +
>> +    ret = kvm_irqchip_send_msi(kvm_state, *msg);
>> +    if (ret < 0) {
>> +        fprintf(stderr, "KVM: injection failed, MSI lost (%s)\n",
>> +                strerror(-ret));
>> +    }
>> +}
>> +
>>  static uint64_t kvm_apic_mem_read(void *opaque, hwaddr addr,
>>                                    unsigned size)
>>  {
>> @@ -178,13 +189,8 @@ static void kvm_apic_mem_write(void *opaque, hwaddr addr,
>>                                 uint64_t data, unsigned size)
>>  {
>>      MSIMessage msg = { .address = addr, .data = data };
>> -    int ret;
>>  
>> -    ret = kvm_irqchip_send_msi(kvm_state, msg);
>> -    if (ret < 0) {
>> -        fprintf(stderr, "KVM: injection failed, MSI lost (%s)\n",
>> -                strerror(-ret));
>> -    }
>> +    kvm_send_msi(&msg);
>>  }
>>  
>>  static const MemoryRegionOps kvm_apic_io_ops = {
>> @@ -231,6 +237,7 @@ static void kvm_apic_class_init(ObjectClass *klass, void *data)
>>      k->enable_tpr_reporting = kvm_apic_enable_tpr_reporting;
>>      k->vapic_base_update = kvm_apic_vapic_base_update;
>>      k->external_nmi = kvm_apic_external_nmi;
>> +    k->send_msi = kvm_send_msi;
>>  }
>>  
>>  static const TypeInfo kvm_apic_info = {
>> diff --git a/hw/i386/xen/xen_apic.c b/hw/i386/xen/xen_apic.c
>> index 21d68ee04b0a..55769eba7ede 100644
>> --- a/hw/i386/xen/xen_apic.c
>> +++ b/hw/i386/xen/xen_apic.c
>> @@ -68,6 +68,11 @@ static void xen_apic_external_nmi(APICCommonState *s)
>>  {
>>  }
>>  
>> +static void xen_send_msi(MSIMessage *msi)
>> +{
>> +    xen_hvm_inject_msi(msi->address, msi->data);
>> +}
>> +
>>  static void xen_apic_class_init(ObjectClass *klass, void *data)
>>  {
>>      APICCommonClass *k = APIC_COMMON_CLASS(klass);
>> @@ -78,6 +83,7 @@ static void xen_apic_class_init(ObjectClass *klass, void *data)
>>      k->get_tpr = xen_apic_get_tpr;
>>      k->vapic_base_update = xen_apic_vapic_base_update;
>>      k->external_nmi = xen_apic_external_nmi;
>> +    k->send_msi = xen_send_msi;
>>  }
>>  
>>  static const TypeInfo xen_apic_info = {
>> diff --git a/hw/intc/apic.c b/hw/intc/apic.c
>> index 7bd1d279c463..4f3fb44d05e4 100644
>> --- a/hw/intc/apic.c
>> +++ b/hw/intc/apic.c
>> @@ -900,6 +900,11 @@ static void apic_unrealize(DeviceState *dev, Error **errp)
>>      local_apics[s->id] = NULL;
>>  }
>>  
>> +static void apic_send_msi_struct(MSIMessage *msi)
>> +{
>> +    apic_send_msi(msi->address, msi->data);
>> +}
> why not to make apic_send_msi(MSIMessage *msi) instead of adding a wrapper?

Good point, I'll change it.

> Also when interface is switched to send_msi() in 3/5,
> aren't you loosing following checks in apic_mem_writel():
> 
>     if (addr > 0xfff || !index) {

We don't need them.  addr <= 0xfff (the first page) was checked because of the
the APIC register page that overlaid the MSI space.  I think that the comment
in code explains it:

        /* MSI and MMIO APIC are at the same memory location,
         * but actually not on the global bus: MSI is on PCI bus
         * APIC is connected directly to the CPU.
         * Mapping them on the global bus happens to work because
         * MSI registers are reserved in APIC MMIO and vice versa. */