From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
yang zhang wz <yang.zhang.wz@gmail.com>,
feng wu <feng.wu@intel.com>,
mst@redhat.com
Subject: Re: [RFC PATCH 0/3] kvm: x86: speedups for APICv
Date: Fri, 30 Sep 2016 15:33:23 +0200 [thread overview]
Message-ID: <20160930133323.GA18552@potion> (raw)
In-Reply-To: <1865155490.553427.1475185306049.JavaMail.zimbra@redhat.com>
2016-09-29 17:41-0400, Paolo Bonzini:
>> And a more far-fetched one: if we know that PI.ON is set before vm
>> entry, we could just send POSTED_INTR_VECTOR self-IPI after masking
>> interrupts and let APICv copy PIR to IRR and deliver interrupts.
>> There are two possible drawbacks: Is the self-IPI overhead too big?
>> Would APICv IRR evaluation at vm entry take precedence, so we'd have big
>> interrupt priority inversion window?
>
> I don't think there is a risk of inverting interrupt priority, because
> that race is always present. But the overhead is probably too much, the
> cost of the one xchg in __apic_update_irr is probably half of the whole
> IRR update if the PI descriptor cacheline bounces.
Yep, I just ran the vmexit kvm-unit-benchmark -- the cpuid and hypercall
tests are ~1000 cycles slower if I send the notification self-IPI, which
should be far more than PIR->IRR + vmcs_write(RVI, fls(IRR)).
prev parent reply other threads:[~2016-09-30 13:33 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-27 21:20 [RFC PATCH 0/3] kvm: x86: speedups for APICv Paolo Bonzini
2016-09-27 21:20 ` [PATCH 1/3] kvm: x86: avoid atomic operations on APICv vmentry Paolo Bonzini
2016-09-27 21:20 ` [PATCH 2/3] kvm: x86: do not use KVM_REQ_EVENT for APICv interrupt injection Paolo Bonzini
2016-09-27 23:07 ` Michael S. Tsirkin
2016-09-28 8:21 ` Paolo Bonzini
2016-09-28 11:40 ` Wu, Feng
2016-09-28 11:50 ` Paolo Bonzini
2016-09-28 12:06 ` Wu, Feng
2016-09-28 12:14 ` Paolo Bonzini
2016-10-14 7:37 ` Yang Zhang
2016-10-14 8:12 ` Paolo Bonzini
2016-09-28 13:46 ` Michael S. Tsirkin
2016-09-28 14:08 ` Paolo Bonzini
2016-09-28 10:04 ` Wu, Feng
2016-09-28 10:16 ` Paolo Bonzini
2016-09-28 11:53 ` Wu, Feng
2016-09-28 11:55 ` Paolo Bonzini
2016-09-28 12:07 ` Wu, Feng
2016-10-14 7:12 ` Yang Zhang
2016-09-27 21:20 ` [PATCH 3/3] KVM: x86: do not scan IRR twice on APICv vmentry Paolo Bonzini
2016-09-28 14:00 ` Michael S. Tsirkin
2016-09-28 14:44 ` Paolo Bonzini
2016-09-29 2:51 ` Wu, Feng
2016-10-14 7:32 ` Yang Zhang
2016-10-14 7:45 ` Paolo Bonzini
2016-09-29 19:55 ` [RFC PATCH 0/3] kvm: x86: speedups for APICv Radim Krčmář
2016-09-29 21:41 ` Paolo Bonzini
2016-09-30 13:23 ` Radim Krčmář
2016-09-30 13:33 ` Radim Krčmář [this message]
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