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Mon, 17 Oct 2016 15:20:30 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33416) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bwDSU-0007Ru-BL; Mon, 17 Oct 2016 15:20:26 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1376161E67; Mon, 17 Oct 2016 19:20:25 +0000 (UTC) Received: from localhost (ovpn-116-159.phx2.redhat.com [10.3.116.159]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u9HJKN9S032450; Mon, 17 Oct 2016 15:20:24 -0400 Date: Mon, 17 Oct 2016 17:20:22 -0200 From: Eduardo Habkost To: Laurent Vivier Message-ID: <20161017192022.GA3275@thinpad.lan.raisama.net> References: <1476485569-6744-1-git-send-email-lvivier@redhat.com> <1476485569-6744-3-git-send-email-lvivier@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1476485569-6744-3-git-send-email-lvivier@redhat.com> X-Fnord: you can see the fnord User-Agent: Mutt/1.7.0 (2016-08-17) X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 17 Oct 2016 19:20:25 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: Re: [Qemu-arm] [PATCH v3 2/3] exec: rename cpu_exec_init() as cpu_exec_realizefn() X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Anthony Green , qemu-devel@nongnu.org, Alexander Graf , Max Filippov , Greg Ungerer , Guan Xuetao , Jia Liu , Markus Armbruster , Bharata B Rao , David Gibson , Artyom Tarasenko , Chen Gang , Greg Kurz , qemu-arm@nongnu.org, Igor Mammedov , Richard Henderson , Matthew Rosato , Bastian Koppelmann , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: ZSB4xT/hmbQb On Sat, Oct 15, 2016 at 12:52:48AM +0200, Laurent Vivier wrote: > Modify all CPUs to call it from XXX_cpu_realizefn() function. > > Remove all the cannot_destroy_with_object_finalize_yet as > unsafe references have been moved to cpu_exec_realizefn(). > (tested with QOM command provided by commit 4c315c27) > > for arm: > > Setting of cpu->mp_affinity is moved from arm_cpu_initfn() > to arm_cpu_realizefn() as setting of cpu_index is now done > in cpu_exec_realizefn(). > > Signed-off-by: Laurent Vivier [...] > diff --git a/target-arm/cpu.c b/target-arm/cpu.c > index 1b9540e..364a45d 100644 > --- a/target-arm/cpu.c > +++ b/target-arm/cpu.c > @@ -441,22 +441,11 @@ static void arm_cpu_initfn(Object *obj) > CPUState *cs = CPU(obj); > ARMCPU *cpu = ARM_CPU(obj); > static bool inited; > - uint32_t Aff1, Aff0; > > cs->env_ptr = &cpu->env; > - cpu_exec_init(cs, &error_abort); > cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, > g_free, g_free); > > - /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it. > - * We don't support setting cluster ID ([16..23]) (known as Aff2 > - * in later ARM ARM versions), or any of the higher affinity level fields, > - * so these bits always RAZ. > - */ > - Aff1 = cs->cpu_index / ARM_CPUS_PER_CLUSTER; > - Aff0 = cs->cpu_index % ARM_CPUS_PER_CLUSTER; > - cpu->mp_affinity = (Aff1 << ARM_AFF1_SHIFT) | Aff0; > - > #ifndef CONFIG_USER_ONLY > /* Our inbound IRQ and FIQ lines */ > if (kvm_enabled()) { [...] > @@ -631,6 +628,15 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) > set_feature(env, ARM_FEATURE_THUMB_DSP); > } > > + /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it. > + * We don't support setting cluster ID ([16..23]) (known as Aff2 > + * in later ARM ARM versions), or any of the higher affinity level fields, > + * so these bits always RAZ. > + */ > + Aff1 = cs->cpu_index / ARM_CPUS_PER_CLUSTER; > + Aff0 = cs->cpu_index % ARM_CPUS_PER_CLUSTER; > + cpu->mp_affinity = (Aff1 << ARM_AFF1_SHIFT) | Aff0; > + This will override any value set in the "mp-affinity" property, The mp-affinity property can be set by the user in the command-line, and it is also set by machvirt_init() in hw/arm/virt.c. Considering that each CPU is supposed to have a different value, I doubt there are existing use cases for mp-affinity being set directly by the user. I suggest having a "cluster-size" property, instead of "mp-affinity". This way the mp_affinity field can be calculated on realize, based on the configured cluster-size. > if (cpu->reset_hivecs) { > cpu->reset_sctlr |= (1 << 13); > } [...] -- Eduardo From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48384) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bwDSc-0002Vj-1J for qemu-devel@nongnu.org; Mon, 17 Oct 2016 15:20:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bwDSa-0007Tj-Vm for qemu-devel@nongnu.org; Mon, 17 Oct 2016 15:20:33 -0400 Date: Mon, 17 Oct 2016 17:20:22 -0200 From: Eduardo Habkost Message-ID: <20161017192022.GA3275@thinpad.lan.raisama.net> References: <1476485569-6744-1-git-send-email-lvivier@redhat.com> <1476485569-6744-3-git-send-email-lvivier@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1476485569-6744-3-git-send-email-lvivier@redhat.com> Subject: Re: [Qemu-devel] [PATCH v3 2/3] exec: rename cpu_exec_init() as cpu_exec_realizefn() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laurent Vivier Cc: Igor Mammedov , Bharata B Rao , David Gibson , Peter Maydell , Paolo Bonzini , Alexander Graf , Matthew Rosato , qemu-devel@nongnu.org, Richard Henderson , qemu-arm@nongnu.org, Greg Ungerer , Guan Xuetao , Jia Liu , Markus Armbruster , Artyom Tarasenko , "Edgar E . Iglesias" , Michael Walle , Chen Gang , Aurelien Jarno , Anthony Green , qemu-ppc@nongnu.org, Bastian Koppelmann , Greg Kurz , Max Filippov On Sat, Oct 15, 2016 at 12:52:48AM +0200, Laurent Vivier wrote: > Modify all CPUs to call it from XXX_cpu_realizefn() function. > > Remove all the cannot_destroy_with_object_finalize_yet as > unsafe references have been moved to cpu_exec_realizefn(). > (tested with QOM command provided by commit 4c315c27) > > for arm: > > Setting of cpu->mp_affinity is moved from arm_cpu_initfn() > to arm_cpu_realizefn() as setting of cpu_index is now done > in cpu_exec_realizefn(). > > Signed-off-by: Laurent Vivier [...] > diff --git a/target-arm/cpu.c b/target-arm/cpu.c > index 1b9540e..364a45d 100644 > --- a/target-arm/cpu.c > +++ b/target-arm/cpu.c > @@ -441,22 +441,11 @@ static void arm_cpu_initfn(Object *obj) > CPUState *cs = CPU(obj); > ARMCPU *cpu = ARM_CPU(obj); > static bool inited; > - uint32_t Aff1, Aff0; > > cs->env_ptr = &cpu->env; > - cpu_exec_init(cs, &error_abort); > cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, > g_free, g_free); > > - /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it. > - * We don't support setting cluster ID ([16..23]) (known as Aff2 > - * in later ARM ARM versions), or any of the higher affinity level fields, > - * so these bits always RAZ. > - */ > - Aff1 = cs->cpu_index / ARM_CPUS_PER_CLUSTER; > - Aff0 = cs->cpu_index % ARM_CPUS_PER_CLUSTER; > - cpu->mp_affinity = (Aff1 << ARM_AFF1_SHIFT) | Aff0; > - > #ifndef CONFIG_USER_ONLY > /* Our inbound IRQ and FIQ lines */ > if (kvm_enabled()) { [...] > @@ -631,6 +628,15 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) > set_feature(env, ARM_FEATURE_THUMB_DSP); > } > > + /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it. > + * We don't support setting cluster ID ([16..23]) (known as Aff2 > + * in later ARM ARM versions), or any of the higher affinity level fields, > + * so these bits always RAZ. > + */ > + Aff1 = cs->cpu_index / ARM_CPUS_PER_CLUSTER; > + Aff0 = cs->cpu_index % ARM_CPUS_PER_CLUSTER; > + cpu->mp_affinity = (Aff1 << ARM_AFF1_SHIFT) | Aff0; > + This will override any value set in the "mp-affinity" property, The mp-affinity property can be set by the user in the command-line, and it is also set by machvirt_init() in hw/arm/virt.c. Considering that each CPU is supposed to have a different value, I doubt there are existing use cases for mp-affinity being set directly by the user. I suggest having a "cluster-size" property, instead of "mp-affinity". This way the mp_affinity field can be calculated on realize, based on the configured cluster-size. > if (cpu->reset_hivecs) { > cpu->reset_sctlr |= (1 << 13); > } [...] -- Eduardo