From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46090) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bwLxg-0001PR-68 for qemu-devel@nongnu.org; Tue, 18 Oct 2016 00:25:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bwLxc-00074t-Tk for qemu-devel@nongnu.org; Tue, 18 Oct 2016 00:25:12 -0400 Received: from ozlabs.org ([103.22.144.67]:41241) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bwLxc-0006ww-Hw for qemu-devel@nongnu.org; Tue, 18 Oct 2016 00:25:08 -0400 Date: Tue, 18 Oct 2016 15:06:55 +1100 From: David Gibson Message-ID: <20161018040655.GG25390@umbus.fritz.box> References: <1476719064-9242-1-git-send-email-bd.aviv@gmail.com> <20161017100736.68a56fd9@t450s.home> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="cpgGT4jyFUyD7BZ9" Content-Disposition: inline In-Reply-To: <20161017100736.68a56fd9@t450s.home> Subject: Re: [Qemu-devel] [PATCH v4 RESEND 0/3] IOMMU: intel_iommu support map and unmap notifications List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alex Williamson Cc: "Aviv B.D" , Jan Kiszka , qemu-devel@nongnu.org, Peter Xu , "Michael S. Tsirkin" --cpgGT4jyFUyD7BZ9 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Oct 17, 2016 at 10:07:36AM -0600, Alex Williamson wrote: > On Mon, 17 Oct 2016 18:44:21 +0300 > "Aviv B.D" wrote: >=20 > > From: "Aviv Ben-David" > >=20 > > * Advertize Cache Mode capability in iommu cap register.=20 > > This capability is controlled by "cache-mode" property of intel-iommu= device. > > To enable this option call QEMU with "-device intel-iommu,cache-mode= =3Dtrue". > >=20 > > * On page cache invalidation in intel vIOMMU, check if the domain belon= g to > > registered notifier, and notify accordingly. > >=20 > > Currently this patch still doesn't enabling VFIO devices support with v= IOMMU=20 > > present. Current problems: > > * vfio_iommu_map_notify is not aware about memory range belong to speci= fic=20 > > VFIOGuestIOMMU. >=20 > Could you elaborate on why this is an issue? >=20 > > * memory_region_iommu_replay hangs QEMU on start up while it itterate o= ver=20 > > 64bit address space. Commenting out the call to this function enables= =20 > > workable VFIO device while vIOMMU present. >=20 > This has been discussed previously, it would be incorrect for vfio not > to call the replay function. The solution is to add an iommu driver > callback to efficiently walk the mappings within a MemoryRegion. Right, replay is a bit of a hack. There are a couple of other approaches that might be adequate without a new callback: - Make the VFIOGuestIOMMU aware of the guest address range mapped by the vIOMMU. Intel currently advertises that as a full 64-bit address space, but I bet that's not actually true in practice. - Have the IOMMU MR advertise a (minimum) page size for vIOMMU mappings. That may let you stpe through the range with greater strides > Thanks, >=20 > Alex >=20 > > Changes from v1 to v2: > > * remove assumption that the cache do not clears > > * fix lockup on high load. > >=20 > > Changes from v2 to v3: > > * remove debug leftovers > > * split to sepearate commits > > * change is_write to flags in vtd_do_iommu_translate, add IOMMU_NO_FAIL= =20 > > to suppress error propagating to guest. > >=20 > > Changes from v3 to v4: > > * Add property to intel_iommu device to control the CM capability,=20 > > default to False. > > * Use s->iommu_ops.notify_flag_changed to register notifiers. > >=20 > > Changes from v4 to v4 RESEND: > > * Fix codding style pointed by checkpatch.pl script. > >=20 > > Aviv Ben-David (3): > > IOMMU: add option to enable VTD_CAP_CM to vIOMMU capility exposoed to > > guest > > IOMMU: change iommu_op->translate's is_write to flags, add support to > > NO_FAIL flag mode > > IOMMU: enable intel_iommu map and unmap notifiers > >=20 > > exec.c | 3 +- > > hw/i386/amd_iommu.c | 4 +- > > hw/i386/intel_iommu.c | 175 +++++++++++++++++++++++++++++++++= -------- > > hw/i386/intel_iommu_internal.h | 3 + > > include/exec/memory.h | 6 +- > > include/hw/i386/intel_iommu.h | 11 +++ > > memory.c | 3 +- > > 7 files changed, 168 insertions(+), 37 deletions(-) > >=20 >=20 >=20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --cpgGT4jyFUyD7BZ9 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBCAAGBQJYBZ/fAAoJEGw4ysog2bOS5kcQAL7PTXpXG/TZSKQNRMCFsyPM o/2fy49gkMxY0qkrd8i9s35KJBPfOyvWkkHSMeVGvYXvMnT7BqNDuSI7mdiX4RAt luj9hKCU9n09k+1vLxBHv8BSNSESu/sdYYl2ouNtoaPE16octu7wr2iFeKZeu/yJ BW3i1vGlxBP/TFb9FYolkqmKgX96hxtVZPyQsQKwu0BU3nQ2qPtBobkxecIZpTrt bsXfaUn7AT1idMWHcCsY1MiceZ1o1mvMS/10Fqg/Ms8PJXvuDEJswXOfULVFcqyv /WkHJGs91HeI7vdBXWOJwFzim2uqpSEmZyFQ1ty7CiUimX0v+FQOi6GiGYgQfx25 95MkvWzGrj+G0NG6UFsszyw8SxKqY5ZslqWjzL4NdjcqzSlbtzbPlXPK16MGCTO8 jf4IDJ/0GMiMlAQ0dUW2bpBWB3n+EkqH/uWAydqopExosz+4tJn54C9ZhSzDSrM8 SpGzft2PqsZOqidndjPR1satNWPmz/ThRP5LwxUfp9JoyiS9Isjn4po+dPo1yxFe yINhkAB2auks6VDGNyQJx2MYGtNhZ1UgHk5Xh1F9MGecSyVkQBfm6KFKwp30aYCZ jGiiYGKcBqt06o/f6WwJuVi6FM2jZEf3izdnDtQ6/76I/zkWxTgd6nQAPyW/dr7G /iO2X3k9Jxnqn5BxIBmn =QEWD -----END PGP SIGNATURE----- --cpgGT4jyFUyD7BZ9--