diff for duplicates of <20161022065038.GA8547@lst.de> diff --git a/a/1.txt b/N1/1.txt index ebc8561..eb3afac 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -On Fri, Oct 21, 2016 at 05:25:21PM -0700, Dan Williams wrote: +On Fri, Oct 21, 2016@05:25:21PM -0700, Dan Williams wrote: > Some Intel ahci implementations have the capability to expose another > pci-express device's memory resources through an ahci memory bar. Add > the enabling to detect these configurations and register the resources diff --git a/a/content_digest b/N1/content_digest index 58b1b80..fc267f7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,16 +1,10 @@ "ref\0147709592108.3733.7194541797066785254.stgit@dwillia2-desk3.amr.corp.intel.com\0" - "From\0Christoph Hellwig <hch@lst.de>\0" - "Subject\0Re: [PATCH 0/5] ahci: nvme remap support\0" + "From\0hch@lst.de (Christoph Hellwig)\0" + "Subject\0[PATCH 0/5] ahci: nvme remap support\0" "Date\0Sat, 22 Oct 2016 08:50:38 +0200\0" - "To\0Dan Williams <dan.j.williams@intel.com>\0" - "Cc\0tj@kernel.org" - keith.busch@intel.com - linux-ide@vger.kernel.org - hch@lst.de - " linux-nvme@lists.infradead.org\0" "\00:1\0" "b\0" - "On Fri, Oct 21, 2016 at 05:25:21PM -0700, Dan Williams wrote:\n" + "On Fri, Oct 21, 2016@05:25:21PM -0700, Dan Williams wrote:\n" "> Some Intel ahci implementations have the capability to expose another\n" "> pci-express device's memory resources through an ahci memory bar. Add\n" "> the enabling to detect these configurations and register the resources\n" @@ -21,4 +15,4 @@ "tricked by Intel into buying this piece of junk will just have to live\n" with AHCI mode. -9fca0628249db7f627e0c67f652492de5416dd80109c6decb7a65fd0edb78f76 +b876a5b449b8e40d6b63719faa8eee961f3559b8483689cfbf2ac393fb08efff
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