From: Stephen Boyd <sboyd@codeaurora.org>
To: Ritesh Harjani <riteshh@codeaurora.org>
Cc: ulf.hansson@linaro.org, linux-mmc@vger.kernel.org,
adrian.hunter@intel.com, shawn.lin@rock-chips.com,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
david.brown@linaro.org, andy.gross@linaro.org,
linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org,
alex.lemberg@sandisk.com, mateusz.nowak@intel.com,
Yuliy.Izrailov@sandisk.com, asutoshd@codeaurora.org,
kdorfman@codeaurora.org, david.griego@linaro.org,
stummala@codeaurora.org, venkatg@codeaurora.org,
rnayak@codeaurora.org, pramod.gurav@linaro.org
Subject: Re: [PATCH v6 04/14] mmc: sdhci-msm: Change poor style writel/readl of registers
Date: Tue, 8 Nov 2016 15:07:24 -0800 [thread overview]
Message-ID: <20161108230724.GO16026@codeaurora.org> (raw)
In-Reply-To: <1478517877-23733-5-git-send-email-riteshh@codeaurora.org>
On 11/07, Ritesh Harjani wrote:
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 8ef44a2a..42f42aa 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -137,8 +137,9 @@ static int msm_config_cm_dll_phase(struct sdhci_host *host, u8 phase)
> writel_relaxed(config, host->ioaddr + CORE_DLL_CONFIG);
>
> /* Set CK_OUT_EN bit of DLL_CONFIG register to 1. */
> - writel_relaxed((readl_relaxed(host->ioaddr + CORE_DLL_CONFIG)
> - | CORE_CK_OUT_EN), host->ioaddr + CORE_DLL_CONFIG);
> + config = readl_relaxed(host->ioaddr + CORE_DLL_CONFIG);
> + config |= CORE_CK_OUT_EN;
> + writel_relaxed(config, host->ioaddr + CORE_DLL_CONFIG);
>
> /* Wait until CK_OUT_EN bit of DLL_CONFIG register becomes '1' */
> rc = msm_dll_poll_ck_out_en(host, 1);
> @@ -305,6 +306,7 @@ static int msm_init_cm_dll(struct sdhci_host *host)
> struct mmc_host *mmc = host->mmc;
> int wait_cnt = 50;
> unsigned long flags;
> + u32 config = 0;
It needs to be initialized?
>
> spin_lock_irqsave(&host->lock, flags);
>
> @@ -313,33 +315,40 @@ static int msm_init_cm_dll(struct sdhci_host *host)
> * tuning is in progress. Keeping PWRSAVE ON may
> * turn off the clock.
> */
> - writel_relaxed((readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC)
> - & ~CORE_CLK_PWRSAVE), host->ioaddr + CORE_VENDOR_SPEC);
> + config = readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC);
It's written here unconditionally though?
> + config &= ~CORE_CLK_PWRSAVE;
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-11-08 23:07 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-07 11:24 [PATCH v6 00/14] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Ritesh Harjani
[not found] ` <1478517877-23733-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 11:24 ` [PATCH v6 01/14] clk: Add clk_hw_get_clk() helper API to be used by clk providers Ritesh Harjani
2016-11-07 11:24 ` Ritesh Harjani
[not found] ` <1478517877-23733-2-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 3:37 ` Rajendra Nayak
2016-11-08 3:37 ` Rajendra Nayak
[not found] ` <58214862.8080604-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 4:08 ` Ritesh Harjani
2016-11-08 4:08 ` Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 04/14] mmc: sdhci-msm: Change poor style writel/readl of registers Ritesh Harjani
2016-11-07 11:24 ` Ritesh Harjani
2016-11-08 23:07 ` Stephen Boyd [this message]
[not found] ` <20161108230724.GO16026-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-09 11:55 ` Ritesh Harjani
2016-11-09 11:55 ` Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 10/14] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani
2016-11-07 11:24 ` Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 12/14] mmc: sdhci-msm: Save the calculated tuning phase Ritesh Harjani
2016-11-07 11:24 ` Ritesh Harjani
2016-11-08 12:41 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 02/14] clk: qcom: Add rcg ops to return floor value closest to the requested rate Ritesh Harjani
2016-11-07 13:51 ` [PATCH] clk: qcom: fix semicolon.cocci warnings kbuild test robot
[not found] ` <1478517877-23733-3-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 13:51 ` [PATCH v6 02/14] clk: qcom: Add rcg ops to return floor value closest to the requested rate kbuild test robot
2016-11-07 13:51 ` kbuild test robot
2016-11-08 23:02 ` Stephen Boyd
2016-11-08 23:02 ` Stephen Boyd
2016-11-09 11:53 ` Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 03/14] clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 05/14] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
2016-11-08 23:06 ` Stephen Boyd
[not found] ` <20161108230622.GN16026-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 23:14 ` Arnd Bergmann
2016-11-08 23:14 ` Arnd Bergmann
2016-11-09 12:06 ` Ritesh Harjani
2016-11-09 20:43 ` Stephen Boyd
2016-11-14 6:03 ` Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 06/14] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback Ritesh Harjani
[not found] ` <1478517877-23733-7-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 12:15 ` Adrian Hunter
2016-11-08 12:15 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 07/14] mmc: sdhci-msm: Enable few quirks Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 08/14] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
2016-11-08 12:16 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 09/14] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
2016-11-08 12:20 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 11/14] mmc: sdhci-msm: Add HS400 platform support Ritesh Harjani
2016-11-08 12:37 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 13/14] mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit Ritesh Harjani
2016-11-08 12:50 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 14/14] sdhci: sdhci-msm: update dll configuration Ritesh Harjani
[not found] ` <1478517877-23733-15-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 12:57 ` Adrian Hunter
2016-11-08 12:57 ` Adrian Hunter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161108230724.GO16026@codeaurora.org \
--to=sboyd@codeaurora.org \
--cc=Yuliy.Izrailov@sandisk.com \
--cc=adrian.hunter@intel.com \
--cc=alex.lemberg@sandisk.com \
--cc=andy.gross@linaro.org \
--cc=asutoshd@codeaurora.org \
--cc=david.brown@linaro.org \
--cc=david.griego@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=georgi.djakov@linaro.org \
--cc=kdorfman@codeaurora.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=mateusz.nowak@intel.com \
--cc=pramod.gurav@linaro.org \
--cc=riteshh@codeaurora.org \
--cc=rnayak@codeaurora.org \
--cc=shawn.lin@rock-chips.com \
--cc=stummala@codeaurora.org \
--cc=ulf.hansson@linaro.org \
--cc=venkatg@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.