From: jgunthorpe@obsidianresearch.com (Jason Gunthorpe)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH fpga 8/9] fpga socfpga: Use the scatterlist interface
Date: Sun, 13 Nov 2016 17:18:54 -0700 [thread overview]
Message-ID: <20161114001854.GA27248@obsidianresearch.com> (raw)
In-Reply-To: <alpine.DEB.2.10.1611131712210.2735@atull-VirtualBox>
On Sun, Nov 13, 2016 at 05:19:34PM -0600, atull wrote:
> Currently or soon we have 3 drivers that don't really use the sg
> interface natively. So this workaround ends up in each of them?
Thinking of the SG list as a workaround is not really right - the SG
list is a way to pass memory stored in non-contiguous pages around,
and the miter is a way to access them from the CPU.
socfpga *does* use sg natively because it is happy to process the data
from the CPU page-at-time. It just doesn't use DMA.
> That's a lot of duplicated code. Why can't this code be in the
> fpga-mgr.c core for drivers that aren't using sg (to minimizing
> duplication).
Sure, if it is a common pattern it is a good idea to lift it.
I'd add a newop 'write_fragment' and a driver must define write_sg
write_fragment, if write_fragment is used then the core supplies
that loop.
Is there a tree with these new drivers someplace?
> I will test this when I get time, may not be this week. I just
> moved to a new building and lab and am in a course all week and
> so forth.
Sure, I don't expect any problems, Zynq uses the same loop and it
seems fine.
Jason
next prev parent reply other threads:[~2016-11-14 0:18 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-09 22:58 [PATCH fpga 0/9] Zynq FPGA Manager Improvements Jason Gunthorpe
2016-11-09 22:58 ` [PATCH fpga 1/9] fpga zynq: Add missing \n to messages Jason Gunthorpe
2016-11-15 11:05 ` Matthias Brugger
2016-11-15 18:08 ` Jason Gunthorpe
2016-11-16 18:39 ` Moritz Fischer
2016-11-16 20:17 ` Jason Gunthorpe
2016-11-16 22:28 ` atull
2016-11-16 22:43 ` Moritz Fischer
2016-11-16 23:55 ` Jason Gunthorpe
2016-11-17 11:32 ` Matthias Brugger
2016-11-09 22:58 ` [PATCH fpga 2/9] fpga zynq: Check the bitstream for validity Jason Gunthorpe
2016-11-10 0:04 ` Joshua Clayton
2016-11-10 4:58 ` Jason Gunthorpe
2016-11-09 22:58 ` [PATCH fpga 3/9] fpga zynq: Fix incorrect ISR state on bootup Jason Gunthorpe
2016-11-11 0:44 ` Moritz Fischer
2016-11-11 0:53 ` Jason Gunthorpe
2016-11-09 22:58 ` [PATCH fpga 4/9] fpga zynq: Check for errors after completing DMA Jason Gunthorpe
2016-11-17 6:10 ` Moritz Fischer
2016-11-17 18:28 ` Jason Gunthorpe
2016-11-09 22:58 ` [PATCH fpga 5/9] fpga zynq: Remove priv->dev Jason Gunthorpe
2016-11-14 15:13 ` atull
2016-11-14 17:20 ` Moritz Fischer
2016-11-14 23:04 ` Jason Gunthorpe
2016-11-17 18:00 ` Moritz Fischer
2016-11-09 22:58 ` [PATCH fpga 6/9] fpga: Add scatterlist based write ops to the driver ops Jason Gunthorpe
2016-11-09 22:58 ` [PATCH fpga 7/9] fpga zynq: Use the scatterlist interface Jason Gunthorpe
2016-11-09 22:58 ` [PATCH fpga 8/9] fpga socfpga: " Jason Gunthorpe
2016-11-13 23:19 ` atull
2016-11-14 0:18 ` Jason Gunthorpe [this message]
2016-11-14 4:02 ` atull
2016-11-15 4:35 ` Jason Gunthorpe
2016-11-15 15:47 ` atull
2016-11-16 5:20 ` Jason Gunthorpe
2016-11-16 15:45 ` atull
2016-11-16 20:23 ` Jason Gunthorpe
2016-11-17 19:54 ` atull
2016-11-17 20:35 ` atull
2016-11-09 22:58 ` [PATCH fpga 9/9] fpga: Remove support for non-sg drivers Jason Gunthorpe
2016-11-10 15:22 ` Joshua Clayton
2016-11-10 16:33 ` Jason Gunthorpe
2016-11-10 22:07 ` Joshua Clayton
2016-11-13 20:44 ` atull
2016-11-13 22:13 ` Jason Gunthorpe
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