All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <20161114071308.GL3310@dragon>

diff --git a/a/1.txt b/N1/1.txt
index 994eb03..09c418c 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -18,8 +18,8 @@ Can we have a brief introduction of this SoC in commit log?
 >             - fsl-ls1012a-rdb.dts:
 >                     DTS file for FSL LS1012A RDB board.
 > 
-> Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
-> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
+> Signed-off-by: Harninder Rai <harninder.rai-3arQi8VN3Tc@public.gmane.org>
+> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya-3arQi8VN3Tc@public.gmane.org>
 > ---
 >  arch/arm64/boot/dts/freescale/Makefile             |   3 +
 >  arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 115 ++++++++++
@@ -110,7 +110,7 @@ not have fsl-ls1046a-qds.dtb target in mainline kernel.
 > +		clock-frequency = <25000000>;
 > +	};
 > +
-> +	reg_1p8v: regulator at 0 {
+> +	reg_1p8v: regulator@0 {
 
 Drop the unit-address from node name, and name it like regulator-1p8v.
 
@@ -154,7 +154,7 @@ Drop the unit-address from node name, and name it like regulator-1p8v.
 > +&i2c0 {
 > +	status = "okay";
 > +
-> +	codec: sgtl5000 at a {
+> +	codec: sgtl5000@a {
 > +		#sound-dai-cells = <0>;
 > +		compatible = "fsl,sgtl5000";
 > +		reg = <0xa>;
@@ -239,7 +239,7 @@ Please sort labeled nodes alphabetically.
 > +		#address-cells = <1>;
 > +		#size-cells = <0>;
 > +
-> +		cpu0: cpu at 0 {
+> +		cpu0: cpu@0 {
 > +			device_type = "cpu";
 > +			compatible = "arm,cortex-a53";
 > +			reg = <0x0>;
@@ -281,7 +281,7 @@ The following form should be easier for read.
 > +		interrupts = <0 106 IRQ_TYPE_LEVEL_LOW>;
 > +	};
 > +
-> +	gic: interrupt-controller at 1400000 {
+> +	gic: interrupt-controller@1400000 {
 > +		compatible = "arm,gic-400";
 > +		#interrupt-cells = <3>;
 > +		interrupt-controller;
@@ -305,14 +305,14 @@ The following form should be easier for read.
 > +		#size-cells = <2>;
 > +		ranges;
 > +
-> +		clockgen: clocking at 1ee1000 {
+> +		clockgen: clocking@1ee1000 {
 > +			compatible = "fsl,ls1012a-clockgen";
 > +			reg = <0x0 0x1ee1000 0x0 0x1000>;
 > +			#clock-cells = <2>;
 > +			clocks = <&sysclk>;
 > +		};
 > +
-> +		scfg: scfg at 1570000 {
+> +		scfg: scfg@1570000 {
 > +			compatible = "fsl,ls1012a-scfg", "syscon";
 > +			reg = <0x0 0x1570000 0x0 0x10000>;
 > +			big-endian;
@@ -323,14 +323,14 @@ Please sort these nodes with unit-address in order of the address.
 Shawn
 
 > +
-> +		dcfg: dcfg at 1ee0000 {
+> +		dcfg: dcfg@1ee0000 {
 > +			compatible = "fsl,ls1012a-dcfg",
 > +				     "syscon";
 > +			reg = <0x0 0x1ee0000 0x0 0x10000>;
 > +			big-endian;
 > +		};
 > +
-> +		i2c0: i2c at 2180000 {
+> +		i2c0: i2c@2180000 {
 > +			compatible = "fsl,vf610-i2c";
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
@@ -340,7 +340,7 @@ Shawn
 > +			status = "disabled";
 > +		};
 > +
-> +		i2c1: i2c at 2190000 {
+> +		i2c1: i2c@2190000 {
 > +			compatible = "fsl,vf610-i2c";
 > +			#address-cells = <1>;
 > +			#size-cells = <0>;
@@ -350,21 +350,21 @@ Shawn
 > +			status = "disabled";
 > +		};
 > +
-> +		duart0: serial at 21c0500 {
+> +		duart0: serial@21c0500 {
 > +			compatible = "fsl,ns16550", "ns16550a";
 > +			reg = <0x00 0x21c0500 0x0 0x100>;
 > +			interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
 > +			clocks = <&clockgen 4 0>;
 > +		};
 > +
-> +		duart1: serial at 21c0600 {
+> +		duart1: serial@21c0600 {
 > +			compatible = "fsl,ns16550", "ns16550a";
 > +			reg = <0x00 0x21c0600 0x0 0x100>;
 > +			interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
 > +			clocks = <&clockgen 4 0>;
 > +		};
 > +
-> +		gpio0: gpio at 2300000 {
+> +		gpio0: gpio@2300000 {
 > +			compatible = "fsl,qoriq-gpio";
 > +			reg = <0x0 0x2300000 0x0 0x10000>;
 > +			interrupts = <0 66 IRQ_TYPE_LEVEL_LOW>;
@@ -374,7 +374,7 @@ Shawn
 > +			#interrupt-cells = <2>;
 > +		};
 > +
-> +		gpio1: gpio at 2310000 {
+> +		gpio1: gpio@2310000 {
 > +			compatible = "fsl,qoriq-gpio";
 > +			reg = <0x0 0x2310000 0x0 0x10000>;
 > +			interrupts = <0 67 IRQ_TYPE_LEVEL_LOW>;
@@ -384,7 +384,7 @@ Shawn
 > +			#interrupt-cells = <2>;
 > +		};
 > +
-> +		wdog0: wdog at 2ad0000 {
+> +		wdog0: wdog@2ad0000 {
 > +			compatible = "fsl,ls1012a-wdt",
 > +				     "fsl,imx21-wdt";
 > +			reg = <0x0 0x2ad0000 0x0 0x10000>;
@@ -393,7 +393,7 @@ Shawn
 > +			big-endian;
 > +		};
 > +
-> +		sai1: sai at 2b50000 {
+> +		sai1: sai@2b50000 {
 > +			#sound-dai-cells = <0>;
 > +			compatible = "fsl,vf610-sai";
 > +			reg = <0x0 0x2b50000 0x0 0x10000>;
@@ -407,7 +407,7 @@ Shawn
 > +			status = "disabled";
 > +		};
 > +
-> +		sai2: sai at 2b60000 {
+> +		sai2: sai@2b60000 {
 > +			#sound-dai-cells = <0>;
 > +			compatible = "fsl,vf610-sai";
 > +			reg = <0x0 0x2b60000 0x0 0x10000>;
@@ -421,7 +421,7 @@ Shawn
 > +			status = "disabled";
 > +		};
 > +
-> +		edma0: edma at 2c00000 {
+> +		edma0: edma@2c00000 {
 > +			#dma-cells = <2>;
 > +			compatible = "fsl,vf610-edma";
 > +			reg = <0x0 0x2c00000 0x0 0x10000>,
@@ -437,7 +437,7 @@ Shawn
 > +				 <&clockgen 4 3>;
 > +		};
 > +
-> +		sata: sata at 3200000 {
+> +		sata: sata@3200000 {
 > +			compatible = "fsl,ls1012a-ahci";
 > +			reg = <0x0 0x3200000 0x0 0x10000>;
 > +			interrupts = <0 69 IRQ_TYPE_LEVEL_LOW>;
@@ -451,5 +451,9 @@ Shawn
 > 
 > _______________________________________________
 > linux-arm-kernel mailing list
-> linux-arm-kernel at lists.infradead.org
+> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
 > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index e49ff73..1d73099 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,8 +1,15 @@
  "ref\01478715118-12848-1-git-send-email-harninder.rai@nxp.com\0"
- "From\0shawnguo@kernel.org (Shawn Guo)\0"
- "Subject\0[PATCH] arm64: Add DTS support for FSL's LS1012A SoC\0"
+ "ref\01478715118-12848-1-git-send-email-harninder.rai-3arQi8VN3Tc@public.gmane.org\0"
+ "From\0Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0"
+ "Subject\0Re: [PATCH] arm64: Add DTS support for FSL's LS1012A SoC\0"
  "Date\0Mon, 14 Nov 2016 15:13:10 +0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Harninder Rai <harninder.rai-3arQi8VN3Tc@public.gmane.org>\0"
+ "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
+  robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
+  mark.rutland-5wv7dgnIgG8@public.gmane.org
+  oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org
+  Bhaskar Upadhaya <Bhaskar.Upadhaya-3arQi8VN3Tc@public.gmane.org>
+ " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "On Wed, Nov 09, 2016 at 11:41:58PM +0530, Harninder Rai wrote:\n"
@@ -25,8 +32,8 @@
  ">             - fsl-ls1012a-rdb.dts:\n"
  ">                     DTS file for FSL LS1012A RDB board.\n"
  "> \n"
- "> Signed-off-by: Harninder Rai <harninder.rai@nxp.com>\n"
- "> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>\n"
+ "> Signed-off-by: Harninder Rai <harninder.rai-3arQi8VN3Tc@public.gmane.org>\n"
+ "> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya-3arQi8VN3Tc@public.gmane.org>\n"
  "> ---\n"
  ">  arch/arm64/boot/dts/freescale/Makefile             |   3 +\n"
  ">  arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 115 ++++++++++\n"
@@ -117,7 +124,7 @@
  "> +\t\tclock-frequency = <25000000>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\treg_1p8v: regulator at 0 {\n"
+ "> +\treg_1p8v: regulator@0 {\n"
  "\n"
  "Drop the unit-address from node name, and name it like regulator-1p8v.\n"
  "\n"
@@ -161,7 +168,7 @@
  "> +&i2c0 {\n"
  "> +\tstatus = \"okay\";\n"
  "> +\n"
- "> +\tcodec: sgtl5000 at a {\n"
+ "> +\tcodec: sgtl5000@a {\n"
  "> +\t\t#sound-dai-cells = <0>;\n"
  "> +\t\tcompatible = \"fsl,sgtl5000\";\n"
  "> +\t\treg = <0xa>;\n"
@@ -246,7 +253,7 @@
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\tcpu0: cpu at 0 {\n"
+ "> +\t\tcpu0: cpu@0 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"arm,cortex-a53\";\n"
  "> +\t\t\treg = <0x0>;\n"
@@ -288,7 +295,7 @@
  "> +\t\tinterrupts = <0 106 IRQ_TYPE_LEVEL_LOW>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tgic: interrupt-controller at 1400000 {\n"
+ "> +\tgic: interrupt-controller@1400000 {\n"
  "> +\t\tcompatible = \"arm,gic-400\";\n"
  "> +\t\t#interrupt-cells = <3>;\n"
  "> +\t\tinterrupt-controller;\n"
@@ -312,14 +319,14 @@
  "> +\t\t#size-cells = <2>;\n"
  "> +\t\tranges;\n"
  "> +\n"
- "> +\t\tclockgen: clocking at 1ee1000 {\n"
+ "> +\t\tclockgen: clocking@1ee1000 {\n"
  "> +\t\t\tcompatible = \"fsl,ls1012a-clockgen\";\n"
  "> +\t\t\treg = <0x0 0x1ee1000 0x0 0x1000>;\n"
  "> +\t\t\t#clock-cells = <2>;\n"
  "> +\t\t\tclocks = <&sysclk>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tscfg: scfg at 1570000 {\n"
+ "> +\t\tscfg: scfg@1570000 {\n"
  "> +\t\t\tcompatible = \"fsl,ls1012a-scfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x0 0x1570000 0x0 0x10000>;\n"
  "> +\t\t\tbig-endian;\n"
@@ -330,14 +337,14 @@
  "Shawn\n"
  "\n"
  "> +\n"
- "> +\t\tdcfg: dcfg at 1ee0000 {\n"
+ "> +\t\tdcfg: dcfg@1ee0000 {\n"
  "> +\t\t\tcompatible = \"fsl,ls1012a-dcfg\",\n"
  "> +\t\t\t\t     \"syscon\";\n"
  "> +\t\t\treg = <0x0 0x1ee0000 0x0 0x10000>;\n"
  "> +\t\t\tbig-endian;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c0: i2c at 2180000 {\n"
+ "> +\t\ti2c0: i2c@2180000 {\n"
  "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
@@ -347,7 +354,7 @@
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c1: i2c at 2190000 {\n"
+ "> +\t\ti2c1: i2c@2190000 {\n"
  "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <0>;\n"
@@ -357,21 +364,21 @@
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tduart0: serial at 21c0500 {\n"
+ "> +\t\tduart0: serial@21c0500 {\n"
  "> +\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n"
  "> +\t\t\treg = <0x00 0x21c0500 0x0 0x100>;\n"
  "> +\t\t\tinterrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\tclocks = <&clockgen 4 0>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tduart1: serial at 21c0600 {\n"
+ "> +\t\tduart1: serial@21c0600 {\n"
  "> +\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n"
  "> +\t\t\treg = <0x00 0x21c0600 0x0 0x100>;\n"
  "> +\t\t\tinterrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\tclocks = <&clockgen 4 0>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tgpio0: gpio at 2300000 {\n"
+ "> +\t\tgpio0: gpio@2300000 {\n"
  "> +\t\t\tcompatible = \"fsl,qoriq-gpio\";\n"
  "> +\t\t\treg = <0x0 0x2300000 0x0 0x10000>;\n"
  "> +\t\t\tinterrupts = <0 66 IRQ_TYPE_LEVEL_LOW>;\n"
@@ -381,7 +388,7 @@
  "> +\t\t\t#interrupt-cells = <2>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tgpio1: gpio at 2310000 {\n"
+ "> +\t\tgpio1: gpio@2310000 {\n"
  "> +\t\t\tcompatible = \"fsl,qoriq-gpio\";\n"
  "> +\t\t\treg = <0x0 0x2310000 0x0 0x10000>;\n"
  "> +\t\t\tinterrupts = <0 67 IRQ_TYPE_LEVEL_LOW>;\n"
@@ -391,7 +398,7 @@
  "> +\t\t\t#interrupt-cells = <2>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\twdog0: wdog at 2ad0000 {\n"
+ "> +\t\twdog0: wdog@2ad0000 {\n"
  "> +\t\t\tcompatible = \"fsl,ls1012a-wdt\",\n"
  "> +\t\t\t\t     \"fsl,imx21-wdt\";\n"
  "> +\t\t\treg = <0x0 0x2ad0000 0x0 0x10000>;\n"
@@ -400,7 +407,7 @@
  "> +\t\t\tbig-endian;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsai1: sai at 2b50000 {\n"
+ "> +\t\tsai1: sai@2b50000 {\n"
  "> +\t\t\t#sound-dai-cells = <0>;\n"
  "> +\t\t\tcompatible = \"fsl,vf610-sai\";\n"
  "> +\t\t\treg = <0x0 0x2b50000 0x0 0x10000>;\n"
@@ -414,7 +421,7 @@
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsai2: sai at 2b60000 {\n"
+ "> +\t\tsai2: sai@2b60000 {\n"
  "> +\t\t\t#sound-dai-cells = <0>;\n"
  "> +\t\t\tcompatible = \"fsl,vf610-sai\";\n"
  "> +\t\t\treg = <0x0 0x2b60000 0x0 0x10000>;\n"
@@ -428,7 +435,7 @@
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tedma0: edma at 2c00000 {\n"
+ "> +\t\tedma0: edma@2c00000 {\n"
  "> +\t\t\t#dma-cells = <2>;\n"
  "> +\t\t\tcompatible = \"fsl,vf610-edma\";\n"
  "> +\t\t\treg = <0x0 0x2c00000 0x0 0x10000>,\n"
@@ -444,7 +451,7 @@
  "> +\t\t\t\t <&clockgen 4 3>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsata: sata at 3200000 {\n"
+ "> +\t\tsata: sata@3200000 {\n"
  "> +\t\t\tcompatible = \"fsl,ls1012a-ahci\";\n"
  "> +\t\t\treg = <0x0 0x3200000 0x0 0x10000>;\n"
  "> +\t\t\tinterrupts = <0 69 IRQ_TYPE_LEVEL_LOW>;\n"
@@ -458,7 +465,11 @@
  "> \n"
  "> _______________________________________________\n"
  "> linux-arm-kernel mailing list\n"
- "> linux-arm-kernel at lists.infradead.org\n"
- > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
+ "> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\n"
+ "> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-4e5e3018beadd8d47f5f283e220ea3db90108b9da3e99fc2aa6aab67583681a0
+75e49c73af9020ff376b4466b2810c09bd8add7587dd42a70f40534aa9f2a1f1

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.