Re: [PATCH 4/4] x86/tsc: set TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Atom SoCs

[Ingo Molnar <mingo@kernel.org>]

* Bin Gao <bin.gao@linux.intel.com> wrote:

> TSC on Intel Atom SoCs capable of determining TSC frequency by MSR is
> reliable and the frequency is known (because it's provided by HW).
> On these platforms PIT/HPET is generally not available so
> calibration won't work at all and also TSC is the only reliable
> clocksource. So we set both X86_FEATURE_TSC_KNOWN_FREQ and
> X86_FEATURE_TSC_RELIABLE flags to make sure the calibration is
> skipped and no watchdog on TSC.
> +	/*
> +	 * TSC frequency determined by MSR is always considered "known"
> +	 * because it is reported by HW.
> +	 * Another fact is that on MSR capable platforms, PIT/HPET is
> +	 * generally not available so calibration won't work at all.
> +	 */
> +	setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
> +
> +	/*
> +	 * Unfortunately there is no a HW way to report TSC is reliable.
> +	 * We were told by silicon design team that TSC on Atom SoCs are
> +	 * always "reliable". TSC is also the only reliable clocksource
> +	 * on these SoCs (HPET is either not present or not functional)
> +	 * so marke TSC reliable to avoid watchdog on it.

minor nit:

 s/there is no a HW way/
   there is no HW way

Thanks,

	Ingo