diff for duplicates of <20161118184535.GE19884@dell.home> diff --git a/a/1.txt b/N1/1.txt index e927f5f..8729234 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -9,7 +9,7 @@ > > fifth generation SoCs depends on bits in both the System Control Unit > > and the LPC Host Controller. > > -> > Signed-off-by: Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org> +> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > > --- > > Documentation/devicetree/bindings/mfd/aspeed-lpchc.txt | 17 +++++++++++++++++ > @@ -41,7 +41,7 @@ > > > +Example: > > + -> > +lpchc: lpchc@1e7890a0 { +> > +lpchc: lpchc at 1e7890a0 { > > + compatible = "aspeed,ast2500-lpchc", "syscon"; > > + reg = <0x1e7890a0 0xc4>; > > +}; @@ -50,9 +50,5 @@ -- Lee Jones Linaro STMicroelectronics Landing Team Lead -Linaro.org │ Open source software for ARM SoCs +Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 52fd8cf..5be892d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,20 +1,10 @@ "ref\01478097481-14895-1-git-send-email-andrew@aj.id.au\0" "ref\01478097481-14895-4-git-send-email-andrew@aj.id.au\0" "ref\020161118184437.GD19884@dell.home\0" - "ref\020161118184437.GD19884-Re9dqnLqz4GzQB+pC5nmwQ@public.gmane.org\0" - "From\0Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" - "Subject\0Re: [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)\0" + "From\0lee.jones@linaro.org (Lee Jones)\0" + "Subject\0[PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)\0" "Date\0Fri, 18 Nov 2016 18:45:35 +0000\0" - "To\0Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org>" - " arnd-r2nGTMty4D4@public.gmane.org\0" - "Cc\0Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>" - Joel Stanley <joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "[Sending Arnd this time!]\n" @@ -28,7 +18,7 @@ "> > fifth generation SoCs depends on bits in both the System Control Unit\n" "> > and the LPC Host Controller.\n" "> > \n" - "> > Signed-off-by: Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org>\n" + "> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>\n" "> > ---\n" "> > Documentation/devicetree/bindings/mfd/aspeed-lpchc.txt | 17 +++++++++++++++++\n" "> \n" @@ -60,7 +50,7 @@ "> \n" "> > +Example:\n" "> > +\n" - "> > +lpchc: lpchc@1e7890a0 {\n" + "> > +lpchc: lpchc at 1e7890a0 {\n" "> > +\tcompatible = \"aspeed,ast2500-lpchc\", \"syscon\";\n" "> > +\treg = <0x1e7890a0 0xc4>;\n" "> > +};\n" @@ -69,11 +59,7 @@ "-- \n" "Lee Jones\n" "Linaro STMicroelectronics Landing Team Lead\n" - "Linaro.org \342\224\202 Open source software for ARM SoCs\n" - "Follow Linaro: Facebook | Twitter | Blog\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + "Linaro.org ? Open source software for ARM SoCs\n" + Follow Linaro: Facebook | Twitter | Blog -5d0d2e4f8598476f76cd4d3c02d94f5bb37d960c8ddb05de53360ed8e68e7890 +17e77e9575bc2944a646210b24bc17c9fc806b507e1d191b635d38f8d9f513de
diff --git a/a/1.txt b/N2/1.txt index e927f5f..c0da153 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -9,7 +9,7 @@ > > fifth generation SoCs depends on bits in both the System Control Unit > > and the LPC Host Controller. > > -> > Signed-off-by: Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org> +> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > > --- > > Documentation/devicetree/bindings/mfd/aspeed-lpchc.txt | 17 +++++++++++++++++ > @@ -52,7 +52,3 @@ Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index 52fd8cf..0f298ab 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,20 +1,19 @@ "ref\01478097481-14895-1-git-send-email-andrew@aj.id.au\0" "ref\01478097481-14895-4-git-send-email-andrew@aj.id.au\0" "ref\020161118184437.GD19884@dell.home\0" - "ref\020161118184437.GD19884-Re9dqnLqz4GzQB+pC5nmwQ@public.gmane.org\0" - "From\0Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "From\0Lee Jones <lee.jones@linaro.org>\0" "Subject\0Re: [PATCH v2 3/6] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LPCHC)\0" "Date\0Fri, 18 Nov 2016 18:45:35 +0000\0" - "To\0Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org>" - " arnd-r2nGTMty4D4@public.gmane.org\0" - "Cc\0Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>" - Joel Stanley <joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0Andrew Jeffery <andrew@aj.id.au>" + " arnd@arndb.de\0" + "Cc\0Linus Walleij <linus.walleij@linaro.org>" + Joel Stanley <joel@jms.id.au> + Mark Rutland <mark.rutland@arm.com> + Rob Herring <robh+dt@kernel.org> + linux-gpio@vger.kernel.org + linux-arm-kernel@lists.infradead.org + linux-kernel@vger.kernel.org + " devicetree@vger.kernel.org\0" "\00:1\0" "b\0" "[Sending Arnd this time!]\n" @@ -28,7 +27,7 @@ "> > fifth generation SoCs depends on bits in both the System Control Unit\n" "> > and the LPC Host Controller.\n" "> > \n" - "> > Signed-off-by: Andrew Jeffery <andrew-zrmu5oMJ5Fs@public.gmane.org>\n" + "> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>\n" "> > ---\n" "> > Documentation/devicetree/bindings/mfd/aspeed-lpchc.txt | 17 +++++++++++++++++\n" "> \n" @@ -70,10 +69,6 @@ "Lee Jones\n" "Linaro STMicroelectronics Landing Team Lead\n" "Linaro.org \342\224\202 Open source software for ARM SoCs\n" - "Follow Linaro: Facebook | Twitter | Blog\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + Follow Linaro: Facebook | Twitter | Blog -5d0d2e4f8598476f76cd4d3c02d94f5bb37d960c8ddb05de53360ed8e68e7890 +a2f8340402621863d3b72332976fa55b50511173462eb0eeacad168502cdbf80
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