All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <20161123095317.GP10134@dell.home>

diff --git a/a/1.txt b/N1/1.txt
index 96df649..14ccd83 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -360,3 +360,8 @@ Lee Jones
 Linaro STMicroelectronics Landing Team Lead
 Linaro.org │ Open source software for ARM SoCs
 Follow Linaro: Facebook | Twitter | Blog
+
+_______________________________________________
+linux-arm-kernel mailing list
+linux-arm-kernel@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 040a5c0..606e488 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -4,24 +4,24 @@
  "Subject\0Re: [PATCH 7/7] add stm32 multi-functions timer driver in DT\0"
  "Date\0Wed, 23 Nov 2016 09:53:17 +0000\0"
  "To\0Benjamin Gaignard <benjamin.gaignard@linaro.org>\0"
- "Cc\0robh+dt@kernel.org"
-  mark.rutland@arm.com
-  alexandre.torgue@st.com
+ "Cc\0mark.rutland@arm.com"
   devicetree@vger.kernel.org
-  linux-kernel@vger.kernel.org
-  thierry.reding@gmail.com
-  linux-pwm@vger.kernel.org
-  jic23@kernel.org
-  knaack.h@gmx.de
   lars@metafoo.de
-  pmeerw@pmeerw.net
+  alexandre.torgue@st.com
+  linux-pwm@vger.kernel.org
   linux-iio@vger.kernel.org
+  linus.walleij@linaro.org
+  arnaud.pouliquen@st.com
+  linux-kernel@vger.kernel.org
+  robh+dt@kernel.org
+  thierry.reding@gmail.com
   linux-arm-kernel@lists.infradead.org
-  fabrice.gasnier@st.com
+  pmeerw@pmeerw.net
+  knaack.h@gmx.de
   gerald.baeza@st.com
-  arnaud.pouliquen@st.com
-  linus.walleij@linaro.org
+  fabrice.gasnier@st.com
   linaro-kernel@lists.linaro.org
+  jic23@kernel.org
  " Benjamin Gaignard <benjamin.gaignard@st.com>\0"
  "\00:1\0"
  "b\0"
@@ -386,6 +386,11 @@
  "Lee Jones\n"
  "Linaro STMicroelectronics Landing Team Lead\n"
  "Linaro.org \342\224\202 Open source software for ARM SoCs\n"
- Follow Linaro: Facebook | Twitter | Blog
+ "Follow Linaro: Facebook | Twitter | Blog\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-arm-kernel mailing list\n"
+ "linux-arm-kernel@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-17f2b20b376e0a6f4ff40a2b97636994edeb59fa9d57b9989813454942a4f717
+59a3f9d8db5ed7d3b13d66d210731756f32de3f775725054c4b8e791d3866374

diff --git a/a/1.txt b/N2/1.txt
index 96df649..2397f49 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -18,7 +18,7 @@ On Tue, 22 Nov 2016, Benjamin Gaignard wrote:
 >  				};
 >  			};
 > +
-> +			pwm1_pins: pwm@1 {
+> +			pwm1_pins: pwm at 1 {
 > +				pins {
 > +					pinmux = <STM32F429_PA8_FUNC_TIM1_CH1>,
 > +						 <STM32F429_PB13_FUNC_TIM1_CH1N>,
@@ -26,7 +26,7 @@ On Tue, 22 Nov 2016, Benjamin Gaignard wrote:
 > +				};
 > +			};
 > +
-> +			pwm3_pins: pwm@3 {
+> +			pwm3_pins: pwm at 3 {
 > +				pins {
 > +					pinmux = <STM32F429_PB4_FUNC_TIM3_CH1>,
 > +						 <STM32F429_PB5_FUNC_TIM3_CH2>;
@@ -34,19 +34,19 @@ On Tue, 22 Nov 2016, Benjamin Gaignard wrote:
 > +			};
 >  		};
 >  
->  		rcc: rcc@40023810 {
+>  		rcc: rcc at 40023810 {
 > @@ -426,6 +441,237 @@
 >  			interrupts = <80>;
 >  			clocks = <&rcc 0 38>;
 >  		};
 > +
-> +		mfd_timer1: mfdtimer1@40010000 {
+> +		mfd_timer1: mfdtimer1 at 40010000 {
 
 Do you reference this node?
 
 If not, it should read:
 
-  advanced-control@40010000
+  advanced-control at 40010000
 
 > +			compatible = "st,stm32-mfd-timer1";
 
@@ -66,9 +66,9 @@ Also move the associated registration C code into the timer driver.
 
 > +			status = "disabled";
 > +
-> +			pwm1: pwm1@40010000 {
+> +			pwm1: pwm1 at 40010000 {
 
-  pwm@0 {
+  pwm at 0 {
 
 > +				compatible = "st,stm32-pwm1";
 
@@ -77,11 +77,11 @@ st,stm32-advanced-control-pwm
 > +				status = "disabled";
 > +			};
 > +
-> +			iiotimer1: iiotimer1@40010000 {
+> +			iiotimer1: iiotimer1 at 40010000 {
 
 Same here:
 
-  timer@0
+  timer at 0
 
 > +				compatible = "st,stm32-iio-timer1";
 
@@ -91,7 +91,7 @@ st,stm32-advanced-control-timer
 > +			};
 > +		};
 > +
-> +		mfd_timer2: mfdtimer2@40000000 {
+> +		mfd_timer2: mfdtimer2 at 40000000 {
 > +			compatible = "st,stm32-mfd-timer2";
 > +			reg = <0x40000000 0x400>;
 > +			clocks = <&rcc 0 128>;
@@ -99,17 +99,17 @@ st,stm32-advanced-control-timer
 > +			interrupts = <28>;
 > +			status = "disabled";
 > +
-> +			pwm2: pwm2@40000000 {
+> +			pwm2: pwm2 at 40000000 {
 > +				compatible = "st,stm32-pwm2";
 > +				status = "disabled";
 > +			};
-> +			iiotimer2: iiotimer2@40000000 {
+> +			iiotimer2: iiotimer2 at 40000000 {
 > +				compatible = "st,stm32-iio-timer2";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer3: mfdtimer3@40000400 {
+> +		mfd_timer3: mfdtimer3 at 40000400 {
 > +			compatible = "st,stm32-mfd-timer3";
 > +			reg = <0x40000400 0x400>;
 > +			clocks = <&rcc 0 129>;
@@ -117,17 +117,17 @@ st,stm32-advanced-control-timer
 > +			interrupts = <29>;
 > +			status = "disabled";
 > +
-> +			pwm3: pwm3@40000400 {
+> +			pwm3: pwm3 at 40000400 {
 > +				compatible = "st,stm32-pwm3";
 > +				status = "disabled";
 > +			};
-> +			iiotimer3: iiotimer3@40000400 {
+> +			iiotimer3: iiotimer3 at 40000400 {
 > +				compatible = "st,stm32-iio-timer3";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer4: mfdtimer4@40000800 {
+> +		mfd_timer4: mfdtimer4 at 40000800 {
 > +			compatible = "st,stm32-mfd-timer4";
 > +			reg = <0x40000800 0x400>;
 > +			clocks = <&rcc 0 130>;
@@ -135,17 +135,17 @@ st,stm32-advanced-control-timer
 > +			interrupts = <30>;
 > +			status = "disabled";
 > +
-> +			pwm4: pwm4@40000800 {
+> +			pwm4: pwm4 at 40000800 {
 > +				compatible = "st,stm32-pwm4";
 > +				status = "disabled";
 > +			};
-> +			iiotimer4: iiotimer4@40000800 {
+> +			iiotimer4: iiotimer4 at 40000800 {
 > +				compatible = "st,stm32-iio-timer4";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer5: mfdtimer5@40000C00 {
+> +		mfd_timer5: mfdtimer5 at 40000C00 {
 > +			compatible = "st,stm32-mfd-timer5";
 > +			reg = <0x40000C00 0x400>;
 > +			clocks = <&rcc 0 131>;
@@ -153,17 +153,17 @@ st,stm32-advanced-control-timer
 > +			interrupts = <50>;
 > +			status = "disabled";
 > +
-> +			pwm5: pwm5@40000C00 {
+> +			pwm5: pwm5 at 40000C00 {
 > +				compatible = "st,stm32-pwm5";
 > +				status = "disabled";
 > +			};
-> +			iiotimer5: iiotimer5@40000800 {
+> +			iiotimer5: iiotimer5 at 40000800 {
 > +				compatible = "st,stm32-iio-timer5";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer6: mfdtimer6@40001000 {
+> +		mfd_timer6: mfdtimer6 at 40001000 {
 > +			compatible = "st,stm32-mfd-timer6";
 > +			reg = <0x40001000 0x400>;
 > +			clocks = <&rcc 0 132>;
@@ -171,13 +171,13 @@ st,stm32-advanced-control-timer
 > +			interrupts = <54>;
 > +			status = "disabled";
 > +
-> +			iiotimer6: iiotimer6@40001000 {
+> +			iiotimer6: iiotimer6 at 40001000 {
 > +				compatible = "st,stm32-iio-timer6";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer7: mfdtimer7@40001400 {
+> +		mfd_timer7: mfdtimer7 at 40001400 {
 > +			compatible = "st,stm32-mfd-timer7";
 > +			reg = <0x40001400 0x400>;
 > +			clocks = <&rcc 0 133>;
@@ -185,13 +185,13 @@ st,stm32-advanced-control-timer
 > +			interrupts = <55>;
 > +			status = "disabled";
 > +
-> +			iiotimer7: iiotimer7@40001400 {
+> +			iiotimer7: iiotimer7 at 40001400 {
 > +				compatible = "st,stm32-iio-timer7";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer8: mfdtimer8@40010400 {
+> +		mfd_timer8: mfdtimer8 at 40010400 {
 > +			compatible = "st,stm32-mfd-timer8";
 > +			reg = <0x40010400 0x400>;
 > +			clocks = <&rcc 0 161>;
@@ -199,18 +199,18 @@ st,stm32-advanced-control-timer
 > +			interrupts = <46>;
 > +			status = "disabled";
 > +
-> +			pwm8: pwm8@40010400 {
+> +			pwm8: pwm8 at 40010400 {
 > +				compatible = "st,stm32-pwm8";
 > +				status = "disabled";
 > +			};
 > +
-> +			iiotimer8: iiotimer7@40010400 {
+> +			iiotimer8: iiotimer7 at 40010400 {
 > +				compatible = "st,stm32-iio-timer8";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer9: mfdtimer9@40014000 {
+> +		mfd_timer9: mfdtimer9 at 40014000 {
 > +			compatible = "st,stm32-mfd-timer9";
 > +			reg = <0x40014000 0x400>;
 > +			clocks = <&rcc 0 176>;
@@ -218,18 +218,18 @@ st,stm32-advanced-control-timer
 > +			interrupts = <24>;
 > +			status = "disabled";
 > +
-> +			pwm9: pwm9@40014000 {
+> +			pwm9: pwm9 at 40014000 {
 > +				compatible = "st,stm32-pwm9";
 > +				status = "disabled";
 > +			};
 > +
-> +			iiotimer9: iiotimer9@40014000 {
+> +			iiotimer9: iiotimer9 at 40014000 {
 > +				compatible = "st,stm32-iio-timer9";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer10: mfdtimer10@40014400 {
+> +		mfd_timer10: mfdtimer10 at 40014400 {
 > +			compatible = "st,stm32-mfd-timer10";
 > +			reg = <0x40014400 0x400>;
 > +			clocks = <&rcc 0 177>;
@@ -237,13 +237,13 @@ st,stm32-advanced-control-timer
 > +			interrupts = <25>;
 > +			status = "disabled";
 > +
-> +			pwm10: pwm10@40014400 {
+> +			pwm10: pwm10 at 40014400 {
 > +				compatible = "st,stm32-pwm10";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer11: mfdtimer11@40014800 {
+> +		mfd_timer11: mfdtimer11 at 40014800 {
 > +			compatible = "st,stm32-mfd-timer11";
 > +			reg = <0x40014800 0x400>;
 > +			clocks = <&rcc 0 178>;
@@ -251,13 +251,13 @@ st,stm32-advanced-control-timer
 > +			interrupts = <26>;
 > +			status = "disabled";
 > +
-> +			pwm11: pwm11@40014800 {
+> +			pwm11: pwm11 at 40014800 {
 > +				compatible = "st,stm32-pwm11";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer12: mfdtimer12@40001800 {
+> +		mfd_timer12: mfdtimer12 at 40001800 {
 > +			compatible = "st,stm32-mfd-timer12";
 > +			reg = <0x40001800 0x400>;
 > +			clocks = <&rcc 0 134>;
@@ -265,17 +265,17 @@ st,stm32-advanced-control-timer
 > +			interrupts = <43>;
 > +			status = "disabled";
 > +
-> +			pwm12: pwm12@40001800 {
+> +			pwm12: pwm12 at 40001800 {
 > +				compatible = "st,stm32-pwm12";
 > +				status = "disabled";
 > +			};
-> +			iiotimer12: iiotimer12@40001800 {
+> +			iiotimer12: iiotimer12 at 40001800 {
 > +				compatible = "st,stm32-iio-timer12";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer13: mfdtimer13@40001C00 {
+> +		mfd_timer13: mfdtimer13 at 40001C00 {
 > +			compatible = "st,stm32-mfd-timer13";
 > +			reg = <0x40001C00 0x400>;
 > +			clocks = <&rcc 0 135>;
@@ -283,13 +283,13 @@ st,stm32-advanced-control-timer
 > +			interrupts = <44>;
 > +			status = "disabled";
 > +
-> +			pwm13: pwm13@40001C00 {
+> +			pwm13: pwm13 at 40001C00 {
 > +				compatible = "st,stm32-pwm13";
 > +				status = "disabled";
 > +			};
 > +		};
 > +
-> +		mfd_timer14: mfdtimer14@40002000 {
+> +		mfd_timer14: mfdtimer14 at 40002000 {
 > +			compatible = "st,stm32-mfd-timer14";
 > +			reg = <0x40002000 0x400>;
 > +			clocks = <&rcc 0 136>;
@@ -297,7 +297,7 @@ st,stm32-advanced-control-timer
 > +			interrupts = <45>;
 > +			status = "disabled";
 > +
-> +			pwm14: pwm14@40002000 {
+> +			pwm14: pwm14 at 40002000 {
 > +				compatible = "st,stm32-pwm14";
 > +				status = "disabled";
 > +			};
@@ -358,5 +358,5 @@ I'm happy to do the work.
 -- 
 Lee Jones
 Linaro STMicroelectronics Landing Team Lead
-Linaro.org │ Open source software for ARM SoCs
+Linaro.org ? Open source software for ARM SoCs
 Follow Linaro: Facebook | Twitter | Blog
diff --git a/a/content_digest b/N2/content_digest
index 040a5c0..1e408fc 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,28 +1,9 @@
  "ref\01479831207-32699-1-git-send-email-benjamin.gaignard@st.com\0"
  "ref\01479831207-32699-8-git-send-email-benjamin.gaignard@st.com\0"
- "From\0Lee Jones <lee.jones@linaro.org>\0"
- "Subject\0Re: [PATCH 7/7] add stm32 multi-functions timer driver in DT\0"
+ "From\0lee.jones@linaro.org (Lee Jones)\0"
+ "Subject\0[PATCH 7/7] add stm32 multi-functions timer driver in DT\0"
  "Date\0Wed, 23 Nov 2016 09:53:17 +0000\0"
- "To\0Benjamin Gaignard <benjamin.gaignard@linaro.org>\0"
- "Cc\0robh+dt@kernel.org"
-  mark.rutland@arm.com
-  alexandre.torgue@st.com
-  devicetree@vger.kernel.org
-  linux-kernel@vger.kernel.org
-  thierry.reding@gmail.com
-  linux-pwm@vger.kernel.org
-  jic23@kernel.org
-  knaack.h@gmx.de
-  lars@metafoo.de
-  pmeerw@pmeerw.net
-  linux-iio@vger.kernel.org
-  linux-arm-kernel@lists.infradead.org
-  fabrice.gasnier@st.com
-  gerald.baeza@st.com
-  arnaud.pouliquen@st.com
-  linus.walleij@linaro.org
-  linaro-kernel@lists.linaro.org
- " Benjamin Gaignard <benjamin.gaignard@st.com>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Tue, 22 Nov 2016, Benjamin Gaignard wrote:\n"
@@ -45,7 +26,7 @@
  ">  \t\t\t\t};\n"
  ">  \t\t\t};\n"
  "> +\n"
- "> +\t\t\tpwm1_pins: pwm@1 {\n"
+ "> +\t\t\tpwm1_pins: pwm at 1 {\n"
  "> +\t\t\t\tpins {\n"
  "> +\t\t\t\t\tpinmux = <STM32F429_PA8_FUNC_TIM1_CH1>,\n"
  "> +\t\t\t\t\t\t <STM32F429_PB13_FUNC_TIM1_CH1N>,\n"
@@ -53,7 +34,7 @@
  "> +\t\t\t\t};\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tpwm3_pins: pwm@3 {\n"
+ "> +\t\t\tpwm3_pins: pwm at 3 {\n"
  "> +\t\t\t\tpins {\n"
  "> +\t\t\t\t\tpinmux = <STM32F429_PB4_FUNC_TIM3_CH1>,\n"
  "> +\t\t\t\t\t\t <STM32F429_PB5_FUNC_TIM3_CH2>;\n"
@@ -61,19 +42,19 @@
  "> +\t\t\t};\n"
  ">  \t\t};\n"
  ">  \n"
- ">  \t\trcc: rcc@40023810 {\n"
+ ">  \t\trcc: rcc at 40023810 {\n"
  "> @@ -426,6 +441,237 @@\n"
  ">  \t\t\tinterrupts = <80>;\n"
  ">  \t\t\tclocks = <&rcc 0 38>;\n"
  ">  \t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer1: mfdtimer1@40010000 {\n"
+ "> +\t\tmfd_timer1: mfdtimer1 at 40010000 {\n"
  "\n"
  "Do you reference this node?\n"
  "\n"
  "If not, it should read:\n"
  "\n"
- "  advanced-control@40010000\n"
+ "  advanced-control at 40010000\n"
  "\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer1\";\n"
  "\n"
@@ -93,9 +74,9 @@
  "\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm1: pwm1@40010000 {\n"
+ "> +\t\t\tpwm1: pwm1 at 40010000 {\n"
  "\n"
- "  pwm@0 {\n"
+ "  pwm at 0 {\n"
  "\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm1\";\n"
  "\n"
@@ -104,11 +85,11 @@
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tiiotimer1: iiotimer1@40010000 {\n"
+ "> +\t\t\tiiotimer1: iiotimer1 at 40010000 {\n"
  "\n"
  "Same here:\n"
  "\n"
- "  timer@0\n"
+ "  timer at 0\n"
  "\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer1\";\n"
  "\n"
@@ -118,7 +99,7 @@
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer2: mfdtimer2@40000000 {\n"
+ "> +\t\tmfd_timer2: mfdtimer2 at 40000000 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer2\";\n"
  "> +\t\t\treg = <0x40000000 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 128>;\n"
@@ -126,17 +107,17 @@
  "> +\t\t\tinterrupts = <28>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm2: pwm2@40000000 {\n"
+ "> +\t\t\tpwm2: pwm2 at 40000000 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm2\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tiiotimer2: iiotimer2@40000000 {\n"
+ "> +\t\t\tiiotimer2: iiotimer2 at 40000000 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer2\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer3: mfdtimer3@40000400 {\n"
+ "> +\t\tmfd_timer3: mfdtimer3 at 40000400 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer3\";\n"
  "> +\t\t\treg = <0x40000400 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 129>;\n"
@@ -144,17 +125,17 @@
  "> +\t\t\tinterrupts = <29>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm3: pwm3@40000400 {\n"
+ "> +\t\t\tpwm3: pwm3 at 40000400 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm3\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tiiotimer3: iiotimer3@40000400 {\n"
+ "> +\t\t\tiiotimer3: iiotimer3 at 40000400 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer3\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer4: mfdtimer4@40000800 {\n"
+ "> +\t\tmfd_timer4: mfdtimer4 at 40000800 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer4\";\n"
  "> +\t\t\treg = <0x40000800 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 130>;\n"
@@ -162,17 +143,17 @@
  "> +\t\t\tinterrupts = <30>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm4: pwm4@40000800 {\n"
+ "> +\t\t\tpwm4: pwm4 at 40000800 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm4\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tiiotimer4: iiotimer4@40000800 {\n"
+ "> +\t\t\tiiotimer4: iiotimer4 at 40000800 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer4\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer5: mfdtimer5@40000C00 {\n"
+ "> +\t\tmfd_timer5: mfdtimer5 at 40000C00 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer5\";\n"
  "> +\t\t\treg = <0x40000C00 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 131>;\n"
@@ -180,17 +161,17 @@
  "> +\t\t\tinterrupts = <50>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm5: pwm5@40000C00 {\n"
+ "> +\t\t\tpwm5: pwm5 at 40000C00 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm5\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tiiotimer5: iiotimer5@40000800 {\n"
+ "> +\t\t\tiiotimer5: iiotimer5 at 40000800 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer5\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer6: mfdtimer6@40001000 {\n"
+ "> +\t\tmfd_timer6: mfdtimer6 at 40001000 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer6\";\n"
  "> +\t\t\treg = <0x40001000 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 132>;\n"
@@ -198,13 +179,13 @@
  "> +\t\t\tinterrupts = <54>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tiiotimer6: iiotimer6@40001000 {\n"
+ "> +\t\t\tiiotimer6: iiotimer6 at 40001000 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer6\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer7: mfdtimer7@40001400 {\n"
+ "> +\t\tmfd_timer7: mfdtimer7 at 40001400 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer7\";\n"
  "> +\t\t\treg = <0x40001400 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 133>;\n"
@@ -212,13 +193,13 @@
  "> +\t\t\tinterrupts = <55>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tiiotimer7: iiotimer7@40001400 {\n"
+ "> +\t\t\tiiotimer7: iiotimer7 at 40001400 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer7\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer8: mfdtimer8@40010400 {\n"
+ "> +\t\tmfd_timer8: mfdtimer8 at 40010400 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer8\";\n"
  "> +\t\t\treg = <0x40010400 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 161>;\n"
@@ -226,18 +207,18 @@
  "> +\t\t\tinterrupts = <46>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm8: pwm8@40010400 {\n"
+ "> +\t\t\tpwm8: pwm8 at 40010400 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm8\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tiiotimer8: iiotimer7@40010400 {\n"
+ "> +\t\t\tiiotimer8: iiotimer7 at 40010400 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer8\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer9: mfdtimer9@40014000 {\n"
+ "> +\t\tmfd_timer9: mfdtimer9 at 40014000 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer9\";\n"
  "> +\t\t\treg = <0x40014000 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 176>;\n"
@@ -245,18 +226,18 @@
  "> +\t\t\tinterrupts = <24>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm9: pwm9@40014000 {\n"
+ "> +\t\t\tpwm9: pwm9 at 40014000 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm9\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tiiotimer9: iiotimer9@40014000 {\n"
+ "> +\t\t\tiiotimer9: iiotimer9 at 40014000 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer9\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer10: mfdtimer10@40014400 {\n"
+ "> +\t\tmfd_timer10: mfdtimer10 at 40014400 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer10\";\n"
  "> +\t\t\treg = <0x40014400 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 177>;\n"
@@ -264,13 +245,13 @@
  "> +\t\t\tinterrupts = <25>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm10: pwm10@40014400 {\n"
+ "> +\t\t\tpwm10: pwm10 at 40014400 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm10\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer11: mfdtimer11@40014800 {\n"
+ "> +\t\tmfd_timer11: mfdtimer11 at 40014800 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer11\";\n"
  "> +\t\t\treg = <0x40014800 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 178>;\n"
@@ -278,13 +259,13 @@
  "> +\t\t\tinterrupts = <26>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm11: pwm11@40014800 {\n"
+ "> +\t\t\tpwm11: pwm11 at 40014800 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm11\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer12: mfdtimer12@40001800 {\n"
+ "> +\t\tmfd_timer12: mfdtimer12 at 40001800 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer12\";\n"
  "> +\t\t\treg = <0x40001800 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 134>;\n"
@@ -292,17 +273,17 @@
  "> +\t\t\tinterrupts = <43>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm12: pwm12@40001800 {\n"
+ "> +\t\t\tpwm12: pwm12 at 40001800 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm12\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tiiotimer12: iiotimer12@40001800 {\n"
+ "> +\t\t\tiiotimer12: iiotimer12 at 40001800 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-iio-timer12\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer13: mfdtimer13@40001C00 {\n"
+ "> +\t\tmfd_timer13: mfdtimer13 at 40001C00 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer13\";\n"
  "> +\t\t\treg = <0x40001C00 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 135>;\n"
@@ -310,13 +291,13 @@
  "> +\t\t\tinterrupts = <44>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm13: pwm13@40001C00 {\n"
+ "> +\t\t\tpwm13: pwm13 at 40001C00 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm13\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tmfd_timer14: mfdtimer14@40002000 {\n"
+ "> +\t\tmfd_timer14: mfdtimer14 at 40002000 {\n"
  "> +\t\t\tcompatible = \"st,stm32-mfd-timer14\";\n"
  "> +\t\t\treg = <0x40002000 0x400>;\n"
  "> +\t\t\tclocks = <&rcc 0 136>;\n"
@@ -324,7 +305,7 @@
  "> +\t\t\tinterrupts = <45>;\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\n"
- "> +\t\t\tpwm14: pwm14@40002000 {\n"
+ "> +\t\t\tpwm14: pwm14 at 40002000 {\n"
  "> +\t\t\t\tcompatible = \"st,stm32-pwm14\";\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
@@ -385,7 +366,7 @@
  "-- \n"
  "Lee Jones\n"
  "Linaro STMicroelectronics Landing Team Lead\n"
- "Linaro.org \342\224\202 Open source software for ARM SoCs\n"
+ "Linaro.org ? Open source software for ARM SoCs\n"
  Follow Linaro: Facebook | Twitter | Blog
 
-17f2b20b376e0a6f4ff40a2b97636994edeb59fa9d57b9989813454942a4f717
+a30bcd648b5f3551f2a993325992c27c8e8a6bfb1c923f1ef6ba16e0dd4796a2

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.