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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915/bxt: Correct dual-link MIPI port control.
Date: Wed, 23 Nov 2016 22:26:25 +0200	[thread overview]
Message-ID: <20161123202625.GO31595@intel.com> (raw)
In-Reply-To: <20161122130014.GZ31595@intel.com>

On Tue, Nov 22, 2016 at 03:00:14PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 21, 2016 at 02:24:06PM -0800, Bob Paauwe wrote:
> > For BXT, there is only one bit that enables/disables dual-link mode
> > and not different bits depending on which pipe is being used.
> > 
> > Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dsi.c | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> > index 4e0d025..a35c141 100644
> > --- a/drivers/gpu/drm/i915/intel_dsi.c
> > +++ b/drivers/gpu/drm/i915/intel_dsi.c
> > @@ -476,7 +476,10 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder)
> >  		if (intel_dsi->ports == (BIT(PORT_A) | BIT(PORT_C))) {
> >  			temp |= (intel_dsi->dual_link - 1)
> >  						<< DUAL_LINK_MODE_SHIFT;
> > -			temp |= intel_crtc->pipe ?
> > +			if (IS_BROXTON(dev_priv))
> > +				temp |= LANE_CONFIGURATION_DUAL_LINK_A;
> > +			else
> > +				temp |= intel_crtc->pipe ?
> >  					LANE_CONFIGURATION_DUAL_LINK_B :
> >  					LANE_CONFIGURATION_DUAL_LINK_A;
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

And pushed to dinq. Thanks for the patch.

-- 
Ville Syrjälä
Intel OTC
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      reply	other threads:[~2016-11-23 20:26 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-21 22:24 [PATCH] drm/i915/bxt: Correct dual-link MIPI port control Bob Paauwe
2016-11-21 23:15 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-11-22 13:00 ` [PATCH] " Ville Syrjälä
2016-11-23 20:26   ` Ville Syrjälä [this message]

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