From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Hans de Goede <hdegoede@redhat.com>
Cc: Jani Nikula <jani.nikula@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel@lists.freedesktop.org, Dave Airlie <airlied@redhat.com>,
Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [PATCH 2/2] drm/i915/dsi: Fix chv_exec_gpio disabling the GPIOs it is setting
Date: Tue, 29 Nov 2016 14:54:12 +0200 [thread overview]
Message-ID: <20161129125412.GO31595@intel.com> (raw)
In-Reply-To: <20161129123858.4225-2-hdegoede@redhat.com>
On Tue, Nov 29, 2016 at 01:38:58PM +0100, Hans de Goede wrote:
> Set the CHV_GPIO_GPIOEN bit when updating GPIOs from chv_exec_gpio.
>
> Fixes: a0a6d4ffd2ad ("drm/i915/dsi: add support for gpio elements on CHV")
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 579d2f5..47cd1b2 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -300,7 +300,8 @@ static void chv_exec_gpio(struct drm_i915_private *dev_priv,
> mutex_lock(&dev_priv->sb_lock);
> vlv_iosf_sb_write(dev_priv, port, cfg1, 0);
> vlv_iosf_sb_write(dev_priv, port, cfg0,
> - CHV_GPIO_GPIOCFG_GPO | CHV_GPIO_GPIOTXSTATE(value));
> + CHV_GPIO_GPIOEN | CHV_GPIO_GPIOCFG_GPO |
> + CHV_GPIO_GPIOTXSTATE(value));
Indeed.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: stable@vger.kernel.org
> mutex_unlock(&dev_priv->sb_lock);
> }
>
> --
> 2.9.3
--
Ville Syrjälä
Intel OTC
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2016-11-29 12:54 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-29 12:38 [PATCH 1/2] drm/i915/dsi: Fix swapping of MIPI_SEQ_DEASSERT_RESET / MIPI_SEQ_ASSERT_RESET Hans de Goede
2016-11-29 12:38 ` [PATCH 2/2] drm/i915/dsi: Fix chv_exec_gpio disabling the GPIOs it is setting Hans de Goede
2016-11-29 12:54 ` Ville Syrjälä [this message]
2016-11-29 12:48 ` [PATCH 1/2] drm/i915/dsi: Fix swapping of MIPI_SEQ_DEASSERT_RESET / MIPI_SEQ_ASSERT_RESET Ville Syrjälä
2016-11-29 13:06 ` Hans de Goede
2016-11-29 14:06 ` Ville Syrjälä
2016-11-29 18:57 ` Ville Syrjälä
2016-11-30 9:19 ` Hans de Goede
2016-12-01 15:00 ` Hans de Goede
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161129125412.GO31595@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=airlied@redhat.com \
--cc=daniel.vetter@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=hdegoede@redhat.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.