diff for duplicates of <20161129193623.GV31595@intel.com> diff --git a/a/1.txt b/N1/1.txt index ce0a235..2312c49 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,6 +1,6 @@ On Tue, Nov 29, 2016 at 02:40:45PM +0000, Matthew Auld wrote: > On 29 November 2016 at 14:13, <ville.syrjala@linux.intel.com> wrote: -> > From: Ville Syrjälä <ville.syrjala@linux.intel.com> +> > From: Ville Syrj�l� <ville.syrjala@linux.intel.com> > > > > Looks like we're only initializing dev_priv->atomic_cdclk_freq > > at resume and commit times, not at init time. Let's do that as @@ -18,16 +18,12 @@ On Tue, Nov 29, 2016 at 02:40:45PM +0000, Matthew Auld wrote: > > Reported-by: Matthew Auld <matthew.auld@intel.com> > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902 > > Fixes: e0ca7a6be38c ("drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things") -> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> +> > Signed-off-by: Ville Syrj�l� <ville.syrjala@linux.intel.com> > Tested-by: Matthew Auld <matthew.auld@intel.com> > Reviewed-by: Matthew Auld <matthew.auld@intel.com> Pushed to dinq. Thanks for the testing and review. -- -Ville Syrjälä +Ville Syrj�l� Intel OTC -_______________________________________________ -Intel-gfx mailing list -Intel-gfx@lists.freedesktop.org -https://lists.freedesktop.org/mailman/listinfo/intel-gfx diff --git a/a/content_digest b/N1/content_digest index 8b35427..673f757 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,7 +1,7 @@ "ref\01480428837-4207-1-git-send-email-ville.syrjala@linux.intel.com\0" "ref\0CAM0jSHMV9PcTAtLWHkCNKirg+6cMYZy6pE=numArhteT1XncdA@mail.gmail.com\0" "From\0Ville Syrj\303\244l\303\244 <ville.syrjala@linux.intel.com>\0" - "Subject\0Re: [PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time\0" + "Subject\0Re: [Intel-gfx] [PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time\0" "Date\0Tue, 29 Nov 2016 21:36:23 +0200\0" "To\0Matthew Auld <matthew.william.auld@gmail.com>\0" "Cc\0Intel Graphics Development <intel-gfx@lists.freedesktop.org>" @@ -11,7 +11,7 @@ "b\0" "On Tue, Nov 29, 2016 at 02:40:45PM +0000, Matthew Auld wrote:\n" "> On 29 November 2016 at 14:13, <ville.syrjala@linux.intel.com> wrote:\n" - "> > From: Ville Syrj\303\244l\303\244 <ville.syrjala@linux.intel.com>\n" + "> > From: Ville Syrj\303\257\302\277\302\275l\303\257\302\277\302\275 <ville.syrjala@linux.intel.com>\n" "> >\n" "> > Looks like we're only initializing dev_priv->atomic_cdclk_freq\n" "> > at resume and commit times, not at init time. Let's do that as\n" @@ -29,18 +29,14 @@ "> > Reported-by: Matthew Auld <matthew.auld@intel.com>\n" "> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902\n" "> > Fixes: e0ca7a6be38c (\"drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things\")\n" - "> > Signed-off-by: Ville Syrj\303\244l\303\244 <ville.syrjala@linux.intel.com>\n" + "> > Signed-off-by: Ville Syrj\303\257\302\277\302\275l\303\257\302\277\302\275 <ville.syrjala@linux.intel.com>\n" "> Tested-by: Matthew Auld <matthew.auld@intel.com>\n" "> Reviewed-by: Matthew Auld <matthew.auld@intel.com>\n" "\n" "Pushed to dinq. Thanks for the testing and review.\n" "\n" "-- \n" - "Ville Syrj\303\244l\303\244\n" - "Intel OTC\n" - "_______________________________________________\n" - "Intel-gfx mailing list\n" - "Intel-gfx@lists.freedesktop.org\n" - https://lists.freedesktop.org/mailman/listinfo/intel-gfx + "Ville Syrj\303\257\302\277\302\275l\303\257\302\277\302\275\n" + Intel OTC -324f969fd4ee1cb0ed5f0c97cd47433bc6ea8fd49683747a625898204158bf41 +934738e5c558c9c2fb21453d44c746deb440430273700071c2f3b2ad0a550de2
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