From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time Date: Tue, 29 Nov 2016 21:36:23 +0200 Message-ID: <20161129193623.GV31595@intel.com> References: <1480428837-4207-1-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 202D16E3C5 for ; Tue, 29 Nov 2016 19:36:27 +0000 (UTC) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Matthew Auld Cc: Intel Graphics Development , Matthew Auld , stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org T24gVHVlLCBOb3YgMjksIDIwMTYgYXQgMDI6NDA6NDVQTSArMDAwMCwgTWF0dGhldyBBdWxkIHdy b3RlOgo+IE9uIDI5IE5vdmVtYmVyIDIwMTYgYXQgMTQ6MTMsICA8dmlsbGUuc3lyamFsYUBsaW51 eC5pbnRlbC5jb20+IHdyb3RlOgo+ID4gRnJvbTogVmlsbGUgU3lyasOkbMOkIDx2aWxsZS5zeXJq YWxhQGxpbnV4LmludGVsLmNvbT4KPiA+Cj4gPiBMb29rcyBsaWtlIHdlJ3JlIG9ubHkgaW5pdGlh bGl6aW5nIGRldl9wcml2LT5hdG9taWNfY2RjbGtfZnJlcQo+ID4gYXQgcmVzdW1lIGFuZCBjb21t aXQgdGltZXMsIG5vdCBhdCBpbml0IHRpbWUuIExldCdzIGRvIHRoYXQgYXMKPiA+IHdlbGwuCj4g Pgo+ID4gV2UncmUgbm93IGhpdHRpbmcgdGhlICdXQVJOX09OKGludGVsX3N0YXRlLT5jZGNsayA9 PSAwKScgaW4KPiA+IGhzd19jb21wdXRlX2xpbmV0aW1lX3dtKCkgb24gYWNjb3VudCBvZiBwb3B1 bGF0aW5nCj4gPiBpbnRlbF9zdGF0ZS0+Y2RjbGsgZnJvbSBkZXZfcHJpdi0+YXRvbWljX2NkY2xr X2ZyZXEuCj4gPiBQcmV2aW91c2x5IHdlIHdlcmUgbWlzcG9wdWxhdGluZyBpbnRlbF9zdGF0ZS0+ Y2RjbGsgd2l0aAo+ID4gZGV2X3ByaXYtPmNkY2xrX2ZyZXEgd2hpY2ggYWx3YXlzIGhhZCBhIHBy b3BlciB2YWx1ZSBhdCBpbml0Cj4gPiB0aW1lIGFuZCBoZW5jZSB0aGUgV0FSTl9PTigpIGRpZG4n dCB0cmlnZ2VyLgo+ID4KPiA+IENjOiBzdGFibGVAdmdlci5rZXJuZWwub3JnCj4gPiBDYzogTWF0 dGhldyBBdWxkIDxtYXR0aGV3LmF1bGRAaW50ZWwuY29tPgo+ID4gUmVwb3J0ZWQtYnk6IE1hdHRo ZXcgQXVsZCA8bWF0dGhldy5hdWxkQGludGVsLmNvbT4KPiA+IEJ1Z3ppbGxhOiBodHRwczovL2J1 Z3MuZnJlZWRlc2t0b3Aub3JnL3Nob3dfYnVnLmNnaT9pZD05ODkwMgo+ID4gRml4ZXM6IGUwY2E3 YTZiZTM4YyAoImRybS9pOTE1OiBGaXggY2RjbGsgdnMuIGRldl9jZGNsayBtZXNzIHdoZW4gbm90 IHJlY29tcHV0aW5nIHRoaW5ncyIpCj4gPiBTaWduZWQtb2ZmLWJ5OiBWaWxsZSBTeXJqw6Rsw6Qg PHZpbGxlLnN5cmphbGFAbGludXguaW50ZWwuY29tPgo+IFRlc3RlZC1ieTogTWF0dGhldyBBdWxk IDxtYXR0aGV3LmF1bGRAaW50ZWwuY29tPgo+IFJldmlld2VkLWJ5OiBNYXR0aGV3IEF1bGQgPG1h dHRoZXcuYXVsZEBpbnRlbC5jb20+CgpQdXNoZWQgdG8gZGlucS4gVGhhbmtzIGZvciB0aGUgdGVz dGluZyBhbmQgcmV2aWV3LgoKLS0gClZpbGxlIFN5cmrDpGzDpApJbnRlbCBPVEMKX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcg bGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com ([134.134.136.31]:65386 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756039AbcK2Tjd (ORCPT ); Tue, 29 Nov 2016 14:39:33 -0500 Date: Tue, 29 Nov 2016 21:36:23 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Matthew Auld Cc: Intel Graphics Development , Matthew Auld , stable@vger.kernel.org Subject: Re: [Intel-gfx] [PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time Message-ID: <20161129193623.GV31595@intel.com> References: <1480428837-4207-1-git-send-email-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Sender: stable-owner@vger.kernel.org List-ID: On Tue, Nov 29, 2016 at 02:40:45PM +0000, Matthew Auld wrote: > On 29 November 2016 at 14:13, wrote: > > From: Ville Syrj�l� > > > > Looks like we're only initializing dev_priv->atomic_cdclk_freq > > at resume and commit times, not at init time. Let's do that as > > well. > > > > We're now hitting the 'WARN_ON(intel_state->cdclk == 0)' in > > hsw_compute_linetime_wm() on account of populating > > intel_state->cdclk from dev_priv->atomic_cdclk_freq. > > Previously we were mispopulating intel_state->cdclk with > > dev_priv->cdclk_freq which always had a proper value at init > > time and hence the WARN_ON() didn't trigger. > > > > Cc: stable@vger.kernel.org > > Cc: Matthew Auld > > Reported-by: Matthew Auld > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902 > > Fixes: e0ca7a6be38c ("drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things") > > Signed-off-by: Ville Syrj�l� > Tested-by: Matthew Auld > Reviewed-by: Matthew Auld Pushed to dinq. Thanks for the testing and review. -- Ville Syrj�l� Intel OTC