From: Wolfram Sang <wsa-dev@sang-engineering.com>
To: Alexander Stein <alexander.stein@systec-electronic.com>
Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Wolfram Sang <wsa@the-dreams.de>,
linux-i2c@vger.kernel.org
Subject: Re: [PATCH v2 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield
Date: Thu, 1 Dec 2016 23:39:07 +0100 [thread overview]
Message-ID: <20161201223907.GE19261@katana> (raw)
In-Reply-To: <1480523655-10461-1-git-send-email-alexander.stein@systec-electronic.com>
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On Wed, Nov 30, 2016 at 05:34:15PM +0100, Alexander Stein wrote:
> Both Merrifield TRM and Medfield TRM state:
> "Both 7-bit and 10-bit addressing modes are supported."
>
> Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Applied to for-next, thanks!
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prev parent reply other threads:[~2016-12-01 22:39 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-30 16:34 [PATCH v2 1/1] i2c: designware-pcidrv: Add 10bit address feature to medfield/merrifield Alexander Stein
2016-12-01 7:20 ` Jarkko Nikula
2016-12-01 22:39 ` Wolfram Sang [this message]
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