diff for duplicates of <20161202132251.GL2683@dell> diff --git a/a/1.txt b/N1/1.txt index 237851c..f6d276f 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -34,7 +34,7 @@ On Fri, 02 Dec 2016, Benjamin Gaignard wrote: > }; > }; > + -> + pwm1_pins: pwm@1 { +> + pwm1_pins: pwm at 1 { > + pins { > + pinmux = <STM32F429_PA8_FUNC_TIM1_CH1>, > + <STM32F429_PB13_FUNC_TIM1_CH1N>, @@ -42,7 +42,7 @@ On Fri, 02 Dec 2016, Benjamin Gaignard wrote: > + }; > + }; > + -> + pwm3_pins: pwm@3 { +> + pwm3_pins: pwm at 3 { > + pins { > + pinmux = <STM32F429_PB4_FUNC_TIM3_CH1>, > + <STM32F429_PB5_FUNC_TIM3_CH2>; @@ -50,15 +50,15 @@ On Fri, 02 Dec 2016, Benjamin Gaignard wrote: > + }; > }; > -> rcc: rcc@40023810 { +> rcc: rcc at 40023810 { > @@ -426,6 +441,322 @@ > interrupts = <80>; > clocks = <&rcc 0 38>; > }; > + -> + gptimer1: gptimer1@40010000 { +> + gptimer1: gptimer1 at 40010000 { -timer@xxxxxxx +timer at xxxxxxx Node names should be generic and not numbered. @@ -72,7 +72,7 @@ say. > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm1@0 { +> + pwm1 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <4>; > + st,breakinput; @@ -80,7 +80,7 @@ say. > + status = "disabled"; > + }; > + -> + timer1@0 { +> + timer1 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <27>; > + st,input-triggers-names = TIM5_TRGO, @@ -101,21 +101,21 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer2: gptimer2@40000000 { +> + gptimer2: gptimer2 at 40000000 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40000000 0x400>; > + clocks = <&rcc 0 128>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm2@0 { +> + pwm2 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <4>; > + st,32bits-counter; > + status = "disabled"; > + }; > + -> + timer2@0 { +> + timer2 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <28>; > + st,input-triggers-names = TIM1_TRGO, @@ -131,20 +131,20 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer3: gptimer3@40000400 { +> + gptimer3: gptimer3 at 40000400 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40000400 0x400>; > + clocks = <&rcc 0 129>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm3@0 { +> + pwm3 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <4>; > + status = "disabled"; > + }; > + -> + timer3@0 { +> + timer3 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <29>; > + st,input-triggers-names = TIM1_TRGO, @@ -160,20 +160,20 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer4: gptimer4@40000800 { +> + gptimer4: gptimer4 at 40000800 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40000800 0x400>; > + clocks = <&rcc 0 130>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm4@0 { +> + pwm4 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <4>; > + status = "disabled"; > + }; > + -> + timer4@0 { +> + timer4 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <30>; > + st,input-triggers-names = TIM1_TRGO, @@ -189,21 +189,21 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer5: gptimer5@40000C00 { +> + gptimer5: gptimer5 at 40000C00 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40000C00 0x400>; > + clocks = <&rcc 0 131>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm5@0 { +> + pwm5 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <4>; > + st,32bits-counter; > + status = "disabled"; > + }; > + -> + timer5@0 { +> + timer5 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <50>; > + st,input-triggers-names = TIM2_TRGO, @@ -219,14 +219,14 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer6: gptimer6@40001000 { +> + gptimer6: gptimer6 at 40001000 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40001000 0x400>; > + clocks = <&rcc 0 132>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + timer6@0 { +> + timer6 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <54>; > + st,output-triggers-names = TIM6_TRGO; @@ -234,14 +234,14 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer7: gptimer7@40001400 { +> + gptimer7: gptimer7 at 40001400 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40001400 0x400>; > + clocks = <&rcc 0 133>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + timer7@0 { +> + timer7 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <55>; > + st,output-triggers-names = TIM7_TRGO; @@ -249,14 +249,14 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer8: gptimer8@40010400 { +> + gptimer8: gptimer8 at 40010400 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40010400 0x400>; > + clocks = <&rcc 0 161>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm8@0 { +> + pwm8 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <4>; > + st,complementary; @@ -264,7 +264,7 @@ I'll take a look at the C code to see what the alternatives could be. > + status = "disabled"; > + }; > + -> + timer8@0 { +> + timer8 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <46>; > + st,input-triggers-names = TIM1_TRGO, @@ -280,20 +280,20 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer9: gptimer9@40014000 { +> + gptimer9: gptimer9 at 40014000 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40014000 0x400>; > + clocks = <&rcc 0 176>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm9@0 { +> + pwm9 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <2>; > + status = "disabled"; > + }; > + -> + timer9@0 { +> + timer9 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <24>; > + st,input-triggers-names = TIM2_TRGO, @@ -305,48 +305,48 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer10: gptimer10@40014400 { +> + gptimer10: gptimer10 at 40014400 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40014400 0x400>; > + clocks = <&rcc 0 177>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm10@0 { +> + pwm10 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <1>; > + status = "disabled"; > + }; > + }; > + -> + gptimer11: gptimer11@40014800 { +> + gptimer11: gptimer11 at 40014800 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40014800 0x400>; > + clocks = <&rcc 0 178>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm11@0 { +> + pwm11 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <1>; > + status = "disabled"; > + }; > + }; > + -> + gptimer12: gptimer12@40001800 { +> + gptimer12: gptimer12 at 40001800 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40001800 0x400>; > + clocks = <&rcc 0 134>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm12@0 { +> + pwm12 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <2>; > + status = "disabled"; > + }; > + -> + timer12@0 { +> + timer12 at 0 { > + compatible = "st,stm32-timer-trigger"; > + interrupts = <43>; > + st,input-triggers-names = TIM4_TRGO, @@ -358,28 +358,28 @@ I'll take a look at the C code to see what the alternatives could be. > + }; > + }; > + -> + gptimer13: gptimer13@40001C00 { +> + gptimer13: gptimer13 at 40001C00 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40001C00 0x400>; > + clocks = <&rcc 0 135>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm13@0 { +> + pwm13 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <1>; > + status = "disabled"; > + }; > + }; > + -> + gptimer14: gptimer14@40002000 { +> + gptimer14: gptimer14 at 40002000 { > + compatible = "st,stm32-gptimer"; > + reg = <0x40002000 0x400>; > + clocks = <&rcc 0 136>; > + clock-names = "clk_int"; > + status = "disabled"; > + -> + pwm14@0 { +> + pwm14 at 0 { > + compatible = "st,stm32-pwm"; > + st,pwm-num-chan = <1>; > + status = "disabled"; @@ -400,13 +400,13 @@ I'll take a look at the C code to see what the alternatives could be. > +&gptimer1 { > + status = "okay"; > + -> + pwm1@0 { +> + pwm1 at 0 { > + pinctrl-0 = <&pwm1_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + }; > + -> + timer1@0 { +> + timer1 at 0 { > + status = "okay"; > + }; > +}; @@ -418,13 +418,13 @@ I still don't like the '&' syntax though. > +&gptimer3 { > + status = "okay"; > + -> + pwm3@0 { +> + pwm3 at 0 { > + pinctrl-0 = <&pwm3_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + }; > + -> + timer3@0 { +> + timer3 at 0 { > + status = "okay"; > + }; > +}; @@ -432,5 +432,5 @@ I still don't like the '&' syntax though. -- Lee Jones Linaro STMicroelectronics Landing Team Lead -Linaro.org │ Open source software for ARM SoCs +Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog diff --git a/a/content_digest b/N1/content_digest index 2a8d978..fd98903 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,28 +1,9 @@ "ref\01480673842-20804-1-git-send-email-benjamin.gaignard@st.com\0" "ref\01480673842-20804-8-git-send-email-benjamin.gaignard@st.com\0" - "From\0Lee Jones <lee.jones@linaro.org>\0" - "Subject\0Re: [PATCH v3 7/7] ARM: dts: stm32: add stm32 general purpose timer driver in DT\0" + "From\0lee.jones@linaro.org (Lee Jones)\0" + "Subject\0[PATCH v3 7/7] ARM: dts: stm32: add stm32 general purpose timer driver in DT\0" "Date\0Fri, 2 Dec 2016 13:22:51 +0000\0" - "To\0Benjamin Gaignard <benjamin.gaignard@linaro.org>\0" - "Cc\0robh+dt@kernel.org" - mark.rutland@arm.com - alexandre.torgue@st.com - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - thierry.reding@gmail.com - linux-pwm@vger.kernel.org - jic23@kernel.org - knaack.h@gmx.de - lars@metafoo.de - pmeerw@pmeerw.net - linux-iio@vger.kernel.org - linux-arm-kernel@lists.infradead.org - fabrice.gasnier@st.com - gerald.baeza@st.com - arnaud.pouliquen@st.com - linus.walleij@linaro.org - linaro-kernel@lists.linaro.org - " Benjamin Gaignard <benjamin.gaignard@st.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Fri, 02 Dec 2016, Benjamin Gaignard wrote:\n" @@ -61,7 +42,7 @@ "> \t\t\t\t};\n" "> \t\t\t};\n" "> +\n" - "> +\t\t\tpwm1_pins: pwm@1 {\n" + "> +\t\t\tpwm1_pins: pwm at 1 {\n" "> +\t\t\t\tpins {\n" "> +\t\t\t\t\tpinmux = <STM32F429_PA8_FUNC_TIM1_CH1>,\n" "> +\t\t\t\t\t\t <STM32F429_PB13_FUNC_TIM1_CH1N>,\n" @@ -69,7 +50,7 @@ "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpwm3_pins: pwm@3 {\n" + "> +\t\t\tpwm3_pins: pwm at 3 {\n" "> +\t\t\t\tpins {\n" "> +\t\t\t\t\tpinmux = <STM32F429_PB4_FUNC_TIM3_CH1>,\n" "> +\t\t\t\t\t\t <STM32F429_PB5_FUNC_TIM3_CH2>;\n" @@ -77,15 +58,15 @@ "> +\t\t\t};\n" "> \t\t};\n" "> \n" - "> \t\trcc: rcc@40023810 {\n" + "> \t\trcc: rcc at 40023810 {\n" "> @@ -426,6 +441,322 @@\n" "> \t\t\tinterrupts = <80>;\n" "> \t\t\tclocks = <&rcc 0 38>;\n" "> \t\t};\n" "> +\n" - "> +\t\tgptimer1: gptimer1@40010000 {\n" + "> +\t\tgptimer1: gptimer1 at 40010000 {\n" "\n" - "timer@xxxxxxx\n" + "timer at xxxxxxx\n" "\n" "Node names should be generic and not numbered.\n" "\n" @@ -99,7 +80,7 @@ "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm1@0 {\n" + "> +\t\t\tpwm1 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <4>;\n" "> +\t\t\t\tst,breakinput;\n" @@ -107,7 +88,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer1@0 {\n" + "> +\t\t\ttimer1 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <27>;\n" "> +\t\t\t\tst,input-triggers-names = TIM5_TRGO,\n" @@ -128,21 +109,21 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer2: gptimer2@40000000 {\n" + "> +\t\tgptimer2: gptimer2 at 40000000 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40000000 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 128>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm2@0 {\n" + "> +\t\t\tpwm2 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <4>;\n" "> +\t\t\t\tst,32bits-counter;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer2@0 {\n" + "> +\t\t\ttimer2 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <28>;\n" "> +\t\t\t\tst,input-triggers-names = TIM1_TRGO,\n" @@ -158,20 +139,20 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer3: gptimer3@40000400 {\n" + "> +\t\tgptimer3: gptimer3 at 40000400 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40000400 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 129>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm3@0 {\n" + "> +\t\t\tpwm3 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <4>;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer3@0 {\n" + "> +\t\t\ttimer3 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <29>;\n" "> +\t\t\t\tst,input-triggers-names = TIM1_TRGO,\n" @@ -187,20 +168,20 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer4: gptimer4@40000800 {\n" + "> +\t\tgptimer4: gptimer4 at 40000800 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40000800 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 130>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm4@0 {\n" + "> +\t\t\tpwm4 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <4>;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer4@0 {\n" + "> +\t\t\ttimer4 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <30>;\n" "> +\t\t\t\tst,input-triggers-names = TIM1_TRGO,\n" @@ -216,21 +197,21 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer5: gptimer5@40000C00 {\n" + "> +\t\tgptimer5: gptimer5 at 40000C00 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40000C00 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 131>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm5@0 {\n" + "> +\t\t\tpwm5 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <4>;\n" "> +\t\t\t\tst,32bits-counter;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer5@0 {\n" + "> +\t\t\ttimer5 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <50>;\n" "> +\t\t\t\tst,input-triggers-names = TIM2_TRGO,\n" @@ -246,14 +227,14 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer6: gptimer6@40001000 {\n" + "> +\t\tgptimer6: gptimer6 at 40001000 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40001000 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 132>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\ttimer6@0 {\n" + "> +\t\t\ttimer6 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <54>;\n" "> +\t\t\t\tst,output-triggers-names = TIM6_TRGO;\n" @@ -261,14 +242,14 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer7: gptimer7@40001400 {\n" + "> +\t\tgptimer7: gptimer7 at 40001400 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40001400 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 133>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\ttimer7@0 {\n" + "> +\t\t\ttimer7 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <55>;\n" "> +\t\t\t\tst,output-triggers-names = TIM7_TRGO;\n" @@ -276,14 +257,14 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer8: gptimer8@40010400 {\n" + "> +\t\tgptimer8: gptimer8 at 40010400 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40010400 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 161>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm8@0 {\n" + "> +\t\t\tpwm8 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <4>;\n" "> +\t\t\t\tst,complementary;\n" @@ -291,7 +272,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer8@0 {\n" + "> +\t\t\ttimer8 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <46>;\n" "> +\t\t\t\tst,input-triggers-names = TIM1_TRGO,\n" @@ -307,20 +288,20 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer9: gptimer9@40014000 {\n" + "> +\t\tgptimer9: gptimer9 at 40014000 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40014000 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 176>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm9@0 {\n" + "> +\t\t\tpwm9 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <2>;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer9@0 {\n" + "> +\t\t\ttimer9 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <24>;\n" "> +\t\t\t\tst,input-triggers-names = TIM2_TRGO,\n" @@ -332,48 +313,48 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer10: gptimer10@40014400 {\n" + "> +\t\tgptimer10: gptimer10 at 40014400 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40014400 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 177>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm10@0 {\n" + "> +\t\t\tpwm10 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <1>;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer11: gptimer11@40014800 {\n" + "> +\t\tgptimer11: gptimer11 at 40014800 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40014800 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 178>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm11@0 {\n" + "> +\t\t\tpwm11 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <1>;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer12: gptimer12@40001800 {\n" + "> +\t\tgptimer12: gptimer12 at 40001800 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40001800 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 134>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm12@0 {\n" + "> +\t\t\tpwm12 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <2>;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer12@0 {\n" + "> +\t\t\ttimer12 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-timer-trigger\";\n" "> +\t\t\t\tinterrupts = <43>;\n" "> +\t\t\t\tst,input-triggers-names = TIM4_TRGO,\n" @@ -385,28 +366,28 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer13: gptimer13@40001C00 {\n" + "> +\t\tgptimer13: gptimer13 at 40001C00 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40001C00 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 135>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm13@0 {\n" + "> +\t\t\tpwm13 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <1>;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tgptimer14: gptimer14@40002000 {\n" + "> +\t\tgptimer14: gptimer14 at 40002000 {\n" "> +\t\t\tcompatible = \"st,stm32-gptimer\";\n" "> +\t\t\treg = <0x40002000 0x400>;\n" "> +\t\t\tclocks = <&rcc 0 136>;\n" "> +\t\t\tclock-names = \"clk_int\";\n" "> +\t\t\tstatus = \"disabled\";\n" "> +\n" - "> +\t\t\tpwm14@0 {\n" + "> +\t\t\tpwm14 at 0 {\n" "> +\t\t\t\tcompatible = \"st,stm32-pwm\";\n" "> +\t\t\t\tst,pwm-num-chan = <1>;\n" "> +\t\t\t\tstatus = \"disabled\";\n" @@ -427,13 +408,13 @@ "> +&gptimer1 {\n" "> +\tstatus = \"okay\";\n" "> +\n" - "> +\tpwm1@0 {\n" + "> +\tpwm1 at 0 {\n" "> +\t\tpinctrl-0\t= <&pwm1_pins>;\n" "> +\t\tpinctrl-names\t= \"default\";\n" "> +\t\tstatus = \"okay\";\n" "> +\t};\n" "> +\n" - "> +\ttimer1@0 {\n" + "> +\ttimer1 at 0 {\n" "> +\t\tstatus = \"okay\";\n" "> +\t};\n" "> +};\n" @@ -445,13 +426,13 @@ "> +&gptimer3 {\n" "> +\tstatus = \"okay\";\n" "> +\n" - "> +\tpwm3@0 {\n" + "> +\tpwm3 at 0 {\n" "> +\t\tpinctrl-0\t= <&pwm3_pins>;\n" "> +\t\tpinctrl-names\t= \"default\";\n" "> +\t\tstatus = \"okay\";\n" "> +\t};\n" "> +\n" - "> +\ttimer3@0 {\n" + "> +\ttimer3 at 0 {\n" "> +\t\tstatus = \"okay\";\n" "> +\t};\n" "> +};\n" @@ -459,7 +440,7 @@ "-- \n" "Lee Jones\n" "Linaro STMicroelectronics Landing Team Lead\n" - "Linaro.org \342\224\202 Open source software for ARM SoCs\n" + "Linaro.org ? Open source software for ARM SoCs\n" Follow Linaro: Facebook | Twitter | Blog -8ee58086b4efce924f62e6407e066f05079a9a8127319f8021084b1f6f7b0d75 +10ba8f21fb03164da8ec046c2da652d1faf41c8eb2b0f61c9b91adb047b46818
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.