From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60332) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cDpgi-00011T-9I for qemu-devel@nongnu.org; Mon, 05 Dec 2016 04:35:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cDpgd-0001lY-HA for qemu-devel@nongnu.org; Mon, 05 Dec 2016 04:35:56 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:41794 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cDpgd-0001l8-BZ for qemu-devel@nongnu.org; Mon, 05 Dec 2016 04:35:51 -0500 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id uB59YAUK047530 for ; Mon, 5 Dec 2016 04:35:50 -0500 Received: from e24smtp01.br.ibm.com (e24smtp01.br.ibm.com [32.104.18.85]) by mx0b-001b2d01.pphosted.com with ESMTP id 2753jw5k8f-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 05 Dec 2016 04:35:49 -0500 Received: from localhost by e24smtp01.br.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 5 Dec 2016 07:35:47 -0200 Date: Mon, 5 Dec 2016 07:35:39 -0200 From: joserz@linux.vnet.ibm.com References: <1480741206-32737-1-git-send-email-joserz@linux.vnet.ibm.com> <1480741206-32737-3-git-send-email-joserz@linux.vnet.ibm.com> <20161205015639.GB12426@umbus.fritz.box> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20161205015639.GB12426@umbus.fritz.box> Message-Id: <20161205093539.GA16556@pacoca> Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/7] target-ppc: Implement unsigned quadword left/right shift and unit tests List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: Richard Henderson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com On Mon, Dec 05, 2016 at 12:56:39PM +1100, David Gibson wrote: > On Sat, Dec 03, 2016 at 05:37:27PM -0800, Richard Henderson wrote: > > On 12/02/2016 09:00 PM, Jose Ricardo Ziviani wrote: > > > +++ b/include/qemu/host-utils.h > > > @@ -29,6 +29,33 @@ > > > #include "qemu/bswap.h" > > > > > > #ifdef CONFIG_INT128 > > > +static inline void urshift(uint64_t *plow, uint64_t *phigh, uint32_t shift) > > > +{ > > > + __uint128_t val = ((__uint128_t)*phigh << 64) | *plow; > > > + val >>= (shift & 127); > > > + *phigh = val >> 64; > > > + *plow = val & 0xffffffffffffffff; > > > +} > > > + > > > +static inline void ulshift(uint64_t *plow, uint64_t *phigh, > > > + uint32_t shift, bool *overflow) > > > +{ > > > + __uint128_t val = ((__uint128_t)*phigh << 64) | *plow; > > > + > > > + if (shift == 0) { > > > + return; > > > + } > > > + > > > + if (shift > 127 || (val >> (128 - (shift & 127))) != 0) { > > > + *overflow = true; > > > + } > > > + > > > + val <<= (shift & 127); > > > + > > > + *phigh = val >> 64; > > > + *plow = val & 0xffffffffffffffff; > > > +} > > > + > > > > This belongs in qemu/int128.h, not here. And certainly not predicated on > > CONFIG_INT128. > > Is there actually any advantage to the __uint128_t based versions over > the 64-bit versions? Nothing special here. It just looks more clear (to me) to shift all 128 bits at once than 2x64. But I agree we won't loose to have just one function outside CONFIG_INT128. So, I'll remove these two functions and keep only the other two using uint64_t types. Anyway I get a bit confused about int128.h and host-utils.h. I see functions like divu128 and divs128 that could be in int128.h, since there is no similar operation in int128.h. Is there any rule about it? Thank you guys for reviewing it! > > -- > David Gibson | I'll have my music baroque, and my code > david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ > | _way_ _around_! > http://www.ozlabs.org/~dgibson