From: Peter Zijlstra <peterz@infradead.org>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
Ingo Molnar <mingo@kernel.org>, "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [GIT pull] x86/cache: Updates for 4.10
Date: Tue, 13 Dec 2016 09:04:14 +0100 [thread overview]
Message-ID: <20161213080414.GT3207@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <CA+55aFwekvKTgaDB4R7XW=SWwW4PULzf7BZBycq+iKqdKSj2fQ@mail.gmail.com>
On Mon, Dec 12, 2016 at 08:26:50PM -0800, Linus Torvalds wrote:
> On Mon, Dec 12, 2016 at 1:53 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
> >
> > This update provides the support for Intel Cache Allocation Technology, a
> > cache partitioning mechanism.
>
> Ugh, this is some funky stuff. And it's entirely x86-specific, with a
> rather odd special filesystem interface.
>
> It looks pretty self-contained (good), but it also looks majorly
> strange. I will have to think about this. What are the main/expected
> users?
>From what I know its aimed at two groups of users:
Firstly the Virtual Machine usecase, where, by assigning cache masks to
individual VMs you avoid one highly active VM trashing the cache of
another.
Secondly the Real-Time usecase, where we can assign cache slices to
individual CPUs such that we can better isolate RT and !RT workloads
running on the same cache domain (socket).
next prev parent reply other threads:[~2016-12-13 8:04 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-12 9:53 [GIT pull] x86/cache: Updates for 4.10 Thomas Gleixner
2016-12-13 4:26 ` Linus Torvalds
2016-12-13 8:04 ` Peter Zijlstra [this message]
2016-12-13 9:01 ` Thomas Gleixner
2016-12-17 1:44 ` Tony Luck
[not found] <20161221210119.GA56305@linux.intel.com>
2016-12-21 21:31 ` Fenghua Yu
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