From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tony Lindgren Subject: Re: [linux-sunxi] [PATCH 1/2] drivers: pinctrl: add driver for Allwinner H5 SoC Date: Fri, 30 Dec 2016 11:42:11 -0800 Message-ID: <20161230194210.GE3940@atomide.com> References: <20161223125001.1176-1-icenowy@aosc.xyz> <1280f095-ab03-93f8-14d2-99d13ba1ce55@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Linus Walleij Cc: =?utf-8?B?QW5kcsOp?= Przywara , linux-sunxi , "linux-kernel@vger.kernel.org" , "linux-gpio@vger.kernel.org" , Chen-Yu Tsai , Icenowy Zheng , Catalin Marinas , Maxime Ripard , "linux-arm-kernel@lists.infradead.org" List-Id: linux-gpio@vger.kernel.org KiBMaW51cyBXYWxsZWlqIDxsaW51cy53YWxsZWlqQGxpbmFyby5vcmc+IFsxNjEyMzAgMDQ6NTZd Ogo+IE9uIE1vbiwgRGVjIDI2LCAyMDE2IGF0IDM6MzMgUE0sIEFuZHLDqSBQcnp5d2FyYSA8YW5k cmUucHJ6eXdhcmFAYXJtLmNvbT4gd3JvdGU6Cj4gCj4gPiBTbyB3aGlsZSB0aGlzIHBhdGNoIHRl Y2huaWNhbGx5IGxvb2tzIGNvcnJlY3QsIEkgd2FzIHdvbmRlcmluZyBpZiB3ZQo+ID4gc2hvdWxk IHJlYWxseSBleHBsb3JlIHRoZSBwb3NzaWJpbGl0eSBvZiBtYWtpbmcgdGhlIHdob2xlIG9mIHN1 bnhpCj4gPiBwaW5jdHJsIERUIGNvbnRyb2xsZWQuCj4gPiBJIGJyb3VnaHQgdGhpcyB1cCBhIHdo aWxlIGFnbywgYnV0IHBlb3BsZSB3ZXJlbid0IG92ZXJseSBlbnRodXNpYXN0aWMKPiA+IGFib3V0 IGl0LCB0aG91Z2ggdGhlaXIgYXJndW1lbnQgd2VyZW4ndCByZWFsbHkgY29udmluY2luZyB0byBt ZVsxXS4KPiA+Cj4gPiBTbzoKPiA+IEFzIHRoaXMgImRyaXZlciIgaGVyZSBpcyBiYXNpY2FsbHkg YSB0YWJsZSBsaW5raW5nIEdQSU8gYml0IHNldHRpbmdzCj4gPiAodGhlIGFjdHVhbCBtdXggdmFs dWUpIHRvIG5hbWVzIGFuZCBldmVyeSBwaW4gd2UgY2FyZSBhYm91dCBuZWVkcyB0byBiZQo+ID4g ZW51bWVyYXRlZCBpbiB0aGUgRFQgYW55d2F5LCB3aHkgbm90IGp1c3QgYWRkIHNvbWV0aGluZyBs aWtlOgo+ID4gYWxsd2lubmVyLHBpbm11eCA9IDw0PjsKPiA+IHRvIGVhY2ggcGluKGdyb3VwKSBp biB0aGUgRFQgYW5kIGdldCByaWQgb2YgdGhpcyAiZHJpdmVyIiBmaWxlIGhlcmUKPiA+IGVudGly ZWx5Pwo+IAo+IEknbSBvcGVuIHRvIHRoYXQgaWYgeW91IGNhbiB1c2UgcGluY3RybC1zaW5nbGUg d2hpY2ggaXMgaW4gdGhlIGtlcm5lbAo+IGZvciB0aGlzIHB1cnBvc2Ugb25seSwgYW5kIGlzIHVz ZWQgd2l0aCBib3RoIE9NQVBzIGFuZCBIaVNpbGljb24uCj4gCj4gSXQgcmVjZW50bHkgd2FzIGlt cHJvdmVkIGFuZCB3aWxsIGJlIGltcHJvdmVkIG1vcmUgaW4gdGhpcyBjeWNsZSwKPiBzZWUgZm9y IGV4YW1wbGU6Cj4gY29tbWl0IDQyMTI0YmM1OThmNjRmODRiMzMzNWQ1YTA1ODMwNDIwNzY5NWI4 NGYKPiBwaW5jdHJsOiBJbnRyb2R1Y2UgZ2VuZXJpYyAjcGluY3RybC1jZWxscyBhbmQgcGluY3Ry bF9wYXJzZV9pbmRleF93aXRoX2FyZ3MKPiAKPiA+ICguLi4pIEFsc28gSSBndWVzcyB0aGUgY29t bW9uIHN1bnhpCj4gPiBwaW5jdHJsIGRyaXZlciBjb2RlIG5lZWRzIHNvbWUgc2lnbmlmaWNhbnQg cmV3b3JrLgo+IAo+IEkgd291bGQgZ3Vlc3MgaXMganVzdCBuZWVkcyByZXBsYWNpbmcgd2l0aCBw aW5jdHJsLXNpbmdsZSBpbiB0aGF0IGNhc2UuCgpBbmQgaWYgcGluY3RybC1zaW5nbGUgd29uJ3Qg d29yayB0aGVuIGl0IGlzIG5vdyBhbHNvIGJlIGVhc2llciB0byBtYWtlCmhhcmR3YXJlIHNwZWNp ZmljIGRyaXZlcnMgdG9vIHVzaW5nICNwaW5jdHJsLWNlbGxzICsgR0VORVJJQ19QSU5DVFJMX0dS T1VQUyArCkdFTkVSSUNfUElOTVVYX0ZVTkNUSU9OUy4KClJlZ2FyZHMsCgpUb255CgoKX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5l bCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6 Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: tony@atomide.com (Tony Lindgren) Date: Fri, 30 Dec 2016 11:42:11 -0800 Subject: [linux-sunxi] [PATCH 1/2] drivers: pinctrl: add driver for Allwinner H5 SoC In-Reply-To: References: <20161223125001.1176-1-icenowy@aosc.xyz> <1280f095-ab03-93f8-14d2-99d13ba1ce55@arm.com> Message-ID: <20161230194210.GE3940@atomide.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org * Linus Walleij [161230 04:56]: > On Mon, Dec 26, 2016 at 3:33 PM, Andr? Przywara wrote: > > > So while this patch technically looks correct, I was wondering if we > > should really explore the possibility of making the whole of sunxi > > pinctrl DT controlled. > > I brought this up a while ago, but people weren't overly enthusiastic > > about it, though their argument weren't really convincing to me[1]. > > > > So: > > As this "driver" here is basically a table linking GPIO bit settings > > (the actual mux value) to names and every pin we care about needs to be > > enumerated in the DT anyway, why not just add something like: > > allwinner,pinmux = <4>; > > to each pin(group) in the DT and get rid of this "driver" file here > > entirely? > > I'm open to that if you can use pinctrl-single which is in the kernel > for this purpose only, and is used with both OMAPs and HiSilicon. > > It recently was improved and will be improved more in this cycle, > see for example: > commit 42124bc598f64f84b3335d5a058304207695b84f > pinctrl: Introduce generic #pinctrl-cells and pinctrl_parse_index_with_args > > > (...) Also I guess the common sunxi > > pinctrl driver code needs some significant rework. > > I would guess is just needs replacing with pinctrl-single in that case. And if pinctrl-single won't work then it is now also be easier to make hardware specific drivers too using #pinctrl-cells + GENERIC_PINCTRL_GROUPS + GENERIC_PINMUX_FUNCTIONS. Regards, Tony From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754719AbcL3Tm2 (ORCPT ); Fri, 30 Dec 2016 14:42:28 -0500 Received: from muru.com ([72.249.23.125]:54010 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754189AbcL3Tm0 (ORCPT ); Fri, 30 Dec 2016 14:42:26 -0500 Date: Fri, 30 Dec 2016 11:42:11 -0800 From: Tony Lindgren To: Linus Walleij Cc: =?utf-8?B?QW5kcsOp?= Przywara , Icenowy Zheng , Catalin Marinas , Maxime Ripard , Chen-Yu Tsai , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-gpio@vger.kernel.org" , linux-sunxi Subject: Re: [linux-sunxi] [PATCH 1/2] drivers: pinctrl: add driver for Allwinner H5 SoC Message-ID: <20161230194210.GE3940@atomide.com> References: <20161223125001.1176-1-icenowy@aosc.xyz> <1280f095-ab03-93f8-14d2-99d13ba1ce55@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.7.2 (2016-11-26) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Linus Walleij [161230 04:56]: > On Mon, Dec 26, 2016 at 3:33 PM, André Przywara wrote: > > > So while this patch technically looks correct, I was wondering if we > > should really explore the possibility of making the whole of sunxi > > pinctrl DT controlled. > > I brought this up a while ago, but people weren't overly enthusiastic > > about it, though their argument weren't really convincing to me[1]. > > > > So: > > As this "driver" here is basically a table linking GPIO bit settings > > (the actual mux value) to names and every pin we care about needs to be > > enumerated in the DT anyway, why not just add something like: > > allwinner,pinmux = <4>; > > to each pin(group) in the DT and get rid of this "driver" file here > > entirely? > > I'm open to that if you can use pinctrl-single which is in the kernel > for this purpose only, and is used with both OMAPs and HiSilicon. > > It recently was improved and will be improved more in this cycle, > see for example: > commit 42124bc598f64f84b3335d5a058304207695b84f > pinctrl: Introduce generic #pinctrl-cells and pinctrl_parse_index_with_args > > > (...) Also I guess the common sunxi > > pinctrl driver code needs some significant rework. > > I would guess is just needs replacing with pinctrl-single in that case. And if pinctrl-single won't work then it is now also be easier to make hardware specific drivers too using #pinctrl-cells + GENERIC_PINCTRL_GROUPS + GENERIC_PINMUX_FUNCTIONS. Regards, Tony