From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoffer Dall Subject: Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003 Date: Wed, 4 Jan 2017 11:33:22 +0100 Message-ID: <20170104103322.GA20461@cbox> References: <20161229224335.13531-1-cov@codeaurora.org> <20161229224335.13531-2-cov@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 677B8403FB for ; Wed, 4 Jan 2017 05:31:50 -0500 (EST) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AWQTnpGsbNOV for ; Wed, 4 Jan 2017 05:31:49 -0500 (EST) Received: from mail-lf0-f48.google.com (mail-lf0-f48.google.com [209.85.215.48]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 0B877400E9 for ; Wed, 4 Jan 2017 05:31:48 -0500 (EST) Received: by mail-lf0-f48.google.com with SMTP id b14so301864949lfg.2 for ; Wed, 04 Jan 2017 02:33:23 -0800 (PST) Content-Disposition: inline In-Reply-To: <20161229224335.13531-2-cov@codeaurora.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Christopher Covington Cc: linux-doc@vger.kernel.org, kvm@vger.kernel.org, Marc Zyngier , Catalin Marinas , timur@codeaurora.org, Jonathan Corbet , Will Deacon , linux-kernel@vger.kernel.org, Paolo Bonzini , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: kvmarm@lists.cs.columbia.edu On Thu, Dec 29, 2016 at 05:43:32PM -0500, Christopher Covington wrote: > From: Shanker Donthineni > > On the Qualcomm Datacenter Technologies Falkor v1 CPU, memory accesses may > allocate TLB entries using an incorrect ASID when TTBRx_EL1 is being > updated. Changing the TTBRx_EL1[ASID] and TTBRx_EL1[BADDR] fields > separately using a reserved ASID will ensure that there are no TLB entries > with incorrect ASID after changing the the ASID. When we restore guest state in KVM, we completely save and restore TTBRx_EL1 from EL2. Would that be affected by this erratum? Thanks, -Christoffer From mboxrd@z Thu Jan 1 00:00:00 1970 From: christoffer.dall@linaro.org (Christoffer Dall) Date: Wed, 4 Jan 2017 11:33:22 +0100 Subject: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003 In-Reply-To: <20161229224335.13531-2-cov@codeaurora.org> References: <20161229224335.13531-1-cov@codeaurora.org> <20161229224335.13531-2-cov@codeaurora.org> Message-ID: <20170104103322.GA20461@cbox> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, Dec 29, 2016 at 05:43:32PM -0500, Christopher Covington wrote: > From: Shanker Donthineni > > On the Qualcomm Datacenter Technologies Falkor v1 CPU, memory accesses may > allocate TLB entries using an incorrect ASID when TTBRx_EL1 is being > updated. Changing the TTBRx_EL1[ASID] and TTBRx_EL1[BADDR] fields > separately using a reserved ASID will ensure that there are no TLB entries > with incorrect ASID after changing the the ASID. When we restore guest state in KVM, we completely save and restore TTBRx_EL1 from EL2. Would that be affected by this erratum? Thanks, -Christoffer From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759701AbdADKd2 (ORCPT ); Wed, 4 Jan 2017 05:33:28 -0500 Received: from mail-lf0-f52.google.com ([209.85.215.52]:33000 "EHLO mail-lf0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751659AbdADKdY (ORCPT ); Wed, 4 Jan 2017 05:33:24 -0500 Date: Wed, 4 Jan 2017 11:33:22 +0100 From: Christoffer Dall To: Christopher Covington Cc: Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Marc Zyngier , Catalin Marinas , Will Deacon , kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, shankerd@codeaurora.org, timur@codeaurora.org, Jonathan Corbet , linux-doc@vger.kernel.org Subject: Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003 Message-ID: <20170104103322.GA20461@cbox> References: <20161229224335.13531-1-cov@codeaurora.org> <20161229224335.13531-2-cov@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20161229224335.13531-2-cov@codeaurora.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Dec 29, 2016 at 05:43:32PM -0500, Christopher Covington wrote: > From: Shanker Donthineni > > On the Qualcomm Datacenter Technologies Falkor v1 CPU, memory accesses may > allocate TLB entries using an incorrect ASID when TTBRx_EL1 is being > updated. Changing the TTBRx_EL1[ASID] and TTBRx_EL1[BADDR] fields > separately using a reserved ASID will ensure that there are no TLB entries > with incorrect ASID after changing the the ASID. When we restore guest state in KVM, we completely save and restore TTBRx_EL1 from EL2. Would that be affected by this erratum? Thanks, -Christoffer