diff for duplicates of <20170109205746.GA6274@lst.de> diff --git a/a/1.txt b/N1/1.txt index 1f24ead..5efbd69 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -On Mon, Jan 09, 2017@11:34:55PM +0300, Nikita Yushchenko wrote: +On Mon, Jan 09, 2017 at 11:34:55PM +0300, Nikita Yushchenko wrote: > I believe the bounce buffering code you refer to is not in SATA/SCSI/MMC > but in block layer, in particular it should be controlled by > blk_queue_bounce_limit(). [Yes there is CONFIG_MMC_BLOCK_BOUNCE but it @@ -57,3 +57,8 @@ should rely on swiotlb instead. > there is no directly-DMAable memory available at allocation time. For block I/O that is never the case. + +_______________________________________________ +linux-arm-kernel mailing list +linux-arm-kernel@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N1/content_digest index e548a2c..d2ba6b9 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,12 +3,28 @@ "ref\09a03c05d-ad4c-0547-d1fe-01edb8b082d6@cogentembedded.com\0" "ref\06374144.HVL0QxNJiT@wuerfel\0" "ref\0b50e25af-3936-d22d-2e9b-5bf6be19c800@cogentembedded.com\0" - "From\0hch@lst.de (Christoph Hellwig)\0" - "Subject\0[PATCH 1/2] arm64: dma_mapping: allow PCI host driver to limit DMA mask\0" + "From\0Christoph Hellwig <hch@lst.de>\0" + "Subject\0Re: [PATCH 1/2] arm64: dma_mapping: allow PCI host driver to limit DMA mask\0" "Date\0Mon, 9 Jan 2017 21:57:46 +0100\0" + "To\0Nikita Yushchenko <nikita.yoush@cogentembedded.com>\0" + "Cc\0Keith Busch <keith.busch@intel.com>" + Sagi Grimberg <sagi@grimberg.me> + Jens Axboe <axboe@fb.com> + Catalin Marinas <catalin.marinas@arm.com> + Will Deacon <will.deacon@arm.com> + linux-kernel@vger.kernel.org + linux-nvme@lists.infradead.org + Christoph Hellwig <hch@lst.de> + linux-renesas-soc@vger.kernel.org + Simon Horman <horms@verge.net.au> + linux-pci@vger.kernel.org + Bjorn Helgaas <bhelgaas@google.com> + artemi.ivanov@cogentembedded.com + Arnd Bergmann <arnd@linaro.org> + " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "On Mon, Jan 09, 2017@11:34:55PM +0300, Nikita Yushchenko wrote:\n" + "On Mon, Jan 09, 2017 at 11:34:55PM +0300, Nikita Yushchenko wrote:\n" "> I believe the bounce buffering code you refer to is not in SATA/SCSI/MMC\n" "> but in block layer, in particular it should be controlled by\n" "> blk_queue_bounce_limit(). [Yes there is CONFIG_MMC_BLOCK_BOUNCE but it\n" @@ -66,6 +82,11 @@ "> cases when no such information is available at allocation time, or when\n" "> there is no directly-DMAable memory available at allocation time.\n" "\n" - For block I/O that is never the case. + "For block I/O that is never the case.\n" + "\n" + "_______________________________________________\n" + "linux-arm-kernel mailing list\n" + "linux-arm-kernel@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -850d2cd7fb5d6e4cd0895db8bd420c5003bfb56d8e5cf3a8dd0e9ebbaeace6e8 +ea7cf08e5373a5bebf0048855876361dc81b28c60b23d18c8bdf2b5cdfa4d302
diff --git a/a/1.txt b/N2/1.txt index 1f24ead..3252509 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,4 +1,4 @@ -On Mon, Jan 09, 2017@11:34:55PM +0300, Nikita Yushchenko wrote: +On Mon, Jan 09, 2017 at 11:34:55PM +0300, Nikita Yushchenko wrote: > I believe the bounce buffering code you refer to is not in SATA/SCSI/MMC > but in block layer, in particular it should be controlled by > blk_queue_bounce_limit(). [Yes there is CONFIG_MMC_BLOCK_BOUNCE but it diff --git a/a/content_digest b/N2/content_digest index e548a2c..e9a10cc 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,12 +3,28 @@ "ref\09a03c05d-ad4c-0547-d1fe-01edb8b082d6@cogentembedded.com\0" "ref\06374144.HVL0QxNJiT@wuerfel\0" "ref\0b50e25af-3936-d22d-2e9b-5bf6be19c800@cogentembedded.com\0" - "From\0hch@lst.de (Christoph Hellwig)\0" - "Subject\0[PATCH 1/2] arm64: dma_mapping: allow PCI host driver to limit DMA mask\0" + "From\0Christoph Hellwig <hch@lst.de>\0" + "Subject\0Re: [PATCH 1/2] arm64: dma_mapping: allow PCI host driver to limit DMA mask\0" "Date\0Mon, 9 Jan 2017 21:57:46 +0100\0" + "To\0Nikita Yushchenko <nikita.yoush@cogentembedded.com>\0" + "Cc\0Arnd Bergmann <arnd@linaro.org>" + linux-arm-kernel@lists.infradead.org + Catalin Marinas <catalin.marinas@arm.com> + Will Deacon <will.deacon@arm.com> + linux-kernel@vger.kernel.org + linux-renesas-soc@vger.kernel.org + Simon Horman <horms@verge.net.au> + linux-pci@vger.kernel.org + Bjorn Helgaas <bhelgaas@google.com> + artemi.ivanov@cogentembedded.com + Keith Busch <keith.busch@intel.com> + Jens Axboe <axboe@fb.com> + Christoph Hellwig <hch@lst.de> + Sagi Grimberg <sagi@grimberg.me> + " linux-nvme@lists.infradead.org\0" "\00:1\0" "b\0" - "On Mon, Jan 09, 2017@11:34:55PM +0300, Nikita Yushchenko wrote:\n" + "On Mon, Jan 09, 2017 at 11:34:55PM +0300, Nikita Yushchenko wrote:\n" "> I believe the bounce buffering code you refer to is not in SATA/SCSI/MMC\n" "> but in block layer, in particular it should be controlled by\n" "> blk_queue_bounce_limit(). [Yes there is CONFIG_MMC_BLOCK_BOUNCE but it\n" @@ -68,4 +84,4 @@ "\n" For block I/O that is never the case. -850d2cd7fb5d6e4cd0895db8bd420c5003bfb56d8e5cf3a8dd0e9ebbaeace6e8 +97bdf99646f32507962c619d293cda30741f30e464b7ab50abac9c0759a5aacf
diff --git a/a/1.txt b/N3/1.txt index 1f24ead..3252509 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -1,4 +1,4 @@ -On Mon, Jan 09, 2017@11:34:55PM +0300, Nikita Yushchenko wrote: +On Mon, Jan 09, 2017 at 11:34:55PM +0300, Nikita Yushchenko wrote: > I believe the bounce buffering code you refer to is not in SATA/SCSI/MMC > but in block layer, in particular it should be controlled by > blk_queue_bounce_limit(). [Yes there is CONFIG_MMC_BLOCK_BOUNCE but it diff --git a/a/content_digest b/N3/content_digest index e548a2c..b985f61 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -6,9 +6,10 @@ "From\0hch@lst.de (Christoph Hellwig)\0" "Subject\0[PATCH 1/2] arm64: dma_mapping: allow PCI host driver to limit DMA mask\0" "Date\0Mon, 9 Jan 2017 21:57:46 +0100\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "On Mon, Jan 09, 2017@11:34:55PM +0300, Nikita Yushchenko wrote:\n" + "On Mon, Jan 09, 2017 at 11:34:55PM +0300, Nikita Yushchenko wrote:\n" "> I believe the bounce buffering code you refer to is not in SATA/SCSI/MMC\n" "> but in block layer, in particular it should be controlled by\n" "> blk_queue_bounce_limit(). [Yes there is CONFIG_MMC_BLOCK_BOUNCE but it\n" @@ -68,4 +69,4 @@ "\n" For block I/O that is never the case. -850d2cd7fb5d6e4cd0895db8bd420c5003bfb56d8e5cf3a8dd0e9ebbaeace6e8 +c2c1ef1b03e8bc21dbb7303607b97f7a57d9d44c6c78f061f75524a829451a70
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