From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org,
"Robert R . Howell" <rhowell@uwyo.edu>
Subject: Re: [PATCH v2 1/1] pinctrl: baytrail: Do not add all GPIOs to IRQ domain
Date: Wed, 11 Jan 2017 16:02:10 +0200 [thread overview]
Message-ID: <20170111140210.GR2330@lahna.fi.intel.com> (raw)
In-Reply-To: <20170111134900.31026-1-andriy.shevchenko@linux.intel.com>
On Wed, Jan 11, 2017 at 03:49:00PM +0200, Andy Shevchenko wrote:
> When DIRECT_IRQ_EN is set, the pin is routed directly to the IO-APIC bypassing
> the GPIO driver completely. However, the mask register is still used to
> determine if the pin is supposed to generate IRQ or not.
>
> So with commit 3ae02c14d964 the IRQ core masks all IRQs (because of
> handle_bad_irq()) the pin connected to the touchscreen gets masked as well and
> hence no interrupts.
>
> To make this all work as expected we do not add those GPIOs to the IRQ domain
> that can actually propagate interrupts.
>
> Fixes: 3ae02c14d964 ("pinctrl: intel: set default handler to be handle_bad_irq()")
> Reported-by: Robert R. Howell <rhowell@uwyo.edu>
> Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
next prev parent reply other threads:[~2017-01-11 14:06 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-11 13:49 [PATCH v2 1/1] pinctrl: baytrail: Do not add all GPIOs to IRQ domain Andy Shevchenko
2017-01-11 14:02 ` Mika Westerberg [this message]
2017-01-12 7:12 ` Linus Walleij
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