diff for duplicates of <20170111203326.GB16865@uda0271908> diff --git a/a/1.txt b/N1/1.txt index 6e5ba3c..58881c4 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,38 +3,38 @@ On Thu, Jan 12, 2017 at 04:13:34AM +0800, Icenowy Zheng wrote: > > 12.01.2017, 04:08, "Bin Liu" <b-liu@ti.com>: > > On Thu, Jan 12, 2017 at 03:55:33AM +0800, Icenowy Zheng wrote: -> >> ?11.01.2017, 04:24, "Bin Liu" <b-liu@ti.com>: -> >> ?> On Tue, Jan 03, 2017 at 11:25:34PM +0800, Icenowy Zheng wrote: -> >> ?>> ?Lichee Pi Zero features a USB OTG port. -> >> ?>> -> >> ?>> ?Add support for it. -> >> ?>> -> >> ?>> ?Note: in order to use the Host mode, the board must be powered via the -> >> ?>> ?+5V and GND pins. -> >> ?>> -> >> ?>> ?Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> -> >> ?>> ?--- -> >> ?>> ??arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 10 ++++++++++ -> >> ?>> ??1 file changed, 10 insertions(+) -> >> ?>> -> >> ?>> ?diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts -> >> ?>> ?index 0099affc6ce3..3d9168cbaeca 100644 -> >> ?>> ?--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts -> >> ?>> ?+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts -> >> ?>> ?@@ -71,3 +71,13 @@ -> >> ?>> ??????????pinctrl-names = "default"; -> >> ?>> ??????????status = "okay"; -> >> ?>> ??}; -> >> ?>> ?+ -> >> ?>> ?+&usb_otg { -> >> ?>> ?+ dr_mode = "otg"; -> >> ?> -> >> ?> Why not set this default mode in dtsi instead? -> >> ?> -> >> ?> Regards, -> >> ?> -Bin. +> >> 11.01.2017, 04:24, "Bin Liu" <b-liu@ti.com>: +> >> > On Tue, Jan 03, 2017 at 11:25:34PM +0800, Icenowy Zheng wrote: +> >> >> Lichee Pi Zero features a USB OTG port. +> >> >> +> >> >> Add support for it. +> >> >> +> >> >> Note: in order to use the Host mode, the board must be powered via the +> >> >> +5V and GND pins. +> >> >> +> >> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> +> >> >> --- +> >> >> arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 10 ++++++++++ +> >> >> 1 file changed, 10 insertions(+) +> >> >> +> >> >> diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts +> >> >> index 0099affc6ce3..3d9168cbaeca 100644 +> >> >> --- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts +> >> >> +++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts +> >> >> @@ -71,3 +71,13 @@ +> >> >> pinctrl-names = "default"; +> >> >> status = "okay"; +> >> >> }; +> >> >> + +> >> >> +&usb_otg { +> >> >> + dr_mode = "otg"; +> >> > +> >> > Why not set this default mode in dtsi instead? +> >> > +> >> > Regards, +> >> > -Bin. > >> -> >> ?There's possibly boards which do not have OTG functions. +> >> There's possibly boards which do not have OTG functions. > > > > That is board specific. > > @@ -62,17 +62,17 @@ Regards, > > Regards, > > -Bin. > > -> >> ?Even the official CDR design of V3s uses the USB controller to -> >> ?connect a UVC webcam to make the design a dual-cam design -> >> ?(V3s itself has a CSI). +> >> Even the official CDR design of V3s uses the USB controller to +> >> connect a UVC webcam to make the design a dual-cam design +> >> (V3s itself has a CSI). > >> -> >> ?> -> >> ?>> ?+ status = "okay"; -> >> ?>> ?+}; -> >> ?>> ?+ -> >> ?>> ?+&usbphy { -> >> ?>> ?+ usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>; -> >> ?>> ?+ status = "okay"; -> >> ?>> ?+}; -> >> ?>> ?-- -> >> ?>> ?2.11.0 +> >> > +> >> >> + status = "okay"; +> >> >> +}; +> >> >> + +> >> >> +&usbphy { +> >> >> + usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>; +> >> >> + status = "okay"; +> >> >> +}; +> >> >> -- +> >> >> 2.11.0 diff --git a/a/content_digest b/N1/content_digest index 172c886..5960d86 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -4,10 +4,17 @@ "ref\02733831484164533@web1g.yandex.ru\0" "ref\020170111200811.GA16865@uda0271908\0" "ref\0418251484165614@web21h.yandex.ru\0" - "From\0b-liu@ti.com (Bin Liu)\0" - "Subject\0[PATCH 4/4] ARM: dts: sun8i: add OTG function to Lichee Pi Zero\0" + "From\0Bin Liu <b-liu@ti.com>\0" + "Subject\0Re: [PATCH 4/4] ARM: dts: sun8i: add OTG function to Lichee Pi Zero\0" "Date\0Wed, 11 Jan 2017 14:33:26 -0600\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Icenowy Zheng <icenowy@aosc.xyz>\0" + "Cc\0devicetree@vger.kernel.org <devicetree@vger.kernel.org>" + linux-usb@vger.kernel.org <linux-usb@vger.kernel.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + Kishon Vijay Abraham I <kishon@ti.com> + Chen-Yu Tsai <wens@csie.org> + Maxime Ripard <maxime.ripard@free-electrons.com> + " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" "\00:1\0" "b\0" "On Thu, Jan 12, 2017 at 04:13:34AM +0800, Icenowy Zheng wrote:\n" @@ -15,38 +22,38 @@ "> \n" "> 12.01.2017, 04:08, \"Bin Liu\" <b-liu@ti.com>:\n" "> > On Thu, Jan 12, 2017 at 03:55:33AM +0800, Icenowy Zheng wrote:\n" - "> >> ?11.01.2017, 04:24, \"Bin Liu\" <b-liu@ti.com>:\n" - "> >> ?> On Tue, Jan 03, 2017 at 11:25:34PM +0800, Icenowy Zheng wrote:\n" - "> >> ?>> ?Lichee Pi Zero features a USB OTG port.\n" - "> >> ?>>\n" - "> >> ?>> ?Add support for it.\n" - "> >> ?>>\n" - "> >> ?>> ?Note: in order to use the Host mode, the board must be powered via the\n" - "> >> ?>> ?+5V and GND pins.\n" - "> >> ?>>\n" - "> >> ?>> ?Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>\n" - "> >> ?>> ?---\n" - "> >> ?>> ??arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 10 ++++++++++\n" - "> >> ?>> ??1 file changed, 10 insertions(+)\n" - "> >> ?>>\n" - "> >> ?>> ?diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" - "> >> ?>> ?index 0099affc6ce3..3d9168cbaeca 100644\n" - "> >> ?>> ?--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" - "> >> ?>> ?+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" - "> >> ?>> ?@@ -71,3 +71,13 @@\n" - "> >> ?>> ??????????pinctrl-names = \"default\";\n" - "> >> ?>> ??????????status = \"okay\";\n" - "> >> ?>> ??};\n" - "> >> ?>> ?+\n" - "> >> ?>> ?+&usb_otg {\n" - "> >> ?>> ?+ dr_mode = \"otg\";\n" - "> >> ?>\n" - "> >> ?> Why not set this default mode in dtsi instead?\n" - "> >> ?>\n" - "> >> ?> Regards,\n" - "> >> ?> -Bin.\n" + "> >> \302\24011.01.2017, 04:24, \"Bin Liu\" <b-liu@ti.com>:\n" + "> >> \302\240> On Tue, Jan 03, 2017 at 11:25:34PM +0800, Icenowy Zheng wrote:\n" + "> >> \302\240>> \302\240Lichee Pi Zero features a USB OTG port.\n" + "> >> \302\240>>\n" + "> >> \302\240>> \302\240Add support for it.\n" + "> >> \302\240>>\n" + "> >> \302\240>> \302\240Note: in order to use the Host mode, the board must be powered via the\n" + "> >> \302\240>> \302\240+5V and GND pins.\n" + "> >> \302\240>>\n" + "> >> \302\240>> \302\240Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>\n" + "> >> \302\240>> \302\240---\n" + "> >> \302\240>> \302\240\302\240arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 10 ++++++++++\n" + "> >> \302\240>> \302\240\302\2401 file changed, 10 insertions(+)\n" + "> >> \302\240>>\n" + "> >> \302\240>> \302\240diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" + "> >> \302\240>> \302\240index 0099affc6ce3..3d9168cbaeca 100644\n" + "> >> \302\240>> \302\240--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" + "> >> \302\240>> \302\240+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" + "> >> \302\240>> \302\240@@ -71,3 +71,13 @@\n" + "> >> \302\240>> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240pinctrl-names = \"default\";\n" + "> >> \302\240>> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240status = \"okay\";\n" + "> >> \302\240>> \302\240\302\240};\n" + "> >> \302\240>> \302\240+\n" + "> >> \302\240>> \302\240+&usb_otg {\n" + "> >> \302\240>> \302\240+ dr_mode = \"otg\";\n" + "> >> \302\240>\n" + "> >> \302\240> Why not set this default mode in dtsi instead?\n" + "> >> \302\240>\n" + "> >> \302\240> Regards,\n" + "> >> \302\240> -Bin.\n" "> >>\n" - "> >> ?There's possibly boards which do not have OTG functions.\n" + "> >> \302\240There's possibly boards which do not have OTG functions.\n" "> >\n" "> > That is board specific.\n" "> >\n" @@ -74,19 +81,19 @@ "> > Regards,\n" "> > -Bin.\n" "> >\n" - "> >> ?Even the official CDR design of V3s uses the USB controller to\n" - "> >> ?connect a UVC webcam to make the design a dual-cam design\n" - "> >> ?(V3s itself has a CSI).\n" + "> >> \302\240Even the official CDR design of V3s uses the USB controller to\n" + "> >> \302\240connect a UVC webcam to make the design a dual-cam design\n" + "> >> \302\240(V3s itself has a CSI).\n" "> >>\n" - "> >> ?>\n" - "> >> ?>> ?+ status = \"okay\";\n" - "> >> ?>> ?+};\n" - "> >> ?>> ?+\n" - "> >> ?>> ?+&usbphy {\n" - "> >> ?>> ?+ usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;\n" - "> >> ?>> ?+ status = \"okay\";\n" - "> >> ?>> ?+};\n" - "> >> ?>> ?--\n" - > >> ?>> ?2.11.0 + "> >> \302\240>\n" + "> >> \302\240>> \302\240+ status = \"okay\";\n" + "> >> \302\240>> \302\240+};\n" + "> >> \302\240>> \302\240+\n" + "> >> \302\240>> \302\240+&usbphy {\n" + "> >> \302\240>> \302\240+ usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;\n" + "> >> \302\240>> \302\240+ status = \"okay\";\n" + "> >> \302\240>> \302\240+};\n" + "> >> \302\240>> \302\240--\n" + "> >> \302\240>> \302\2402.11.0" -c8c3fa8a3069eabf5b73d066c3276ef4675af7d06080a6427ec62083a80d086f +acb8414fa2d79f1b46540d3334126d59cc249a6710e8428a51706ff18eae7e34
diff --git a/a/1.txt b/N2/1.txt index 6e5ba3c..58881c4 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -3,38 +3,38 @@ On Thu, Jan 12, 2017 at 04:13:34AM +0800, Icenowy Zheng wrote: > > 12.01.2017, 04:08, "Bin Liu" <b-liu@ti.com>: > > On Thu, Jan 12, 2017 at 03:55:33AM +0800, Icenowy Zheng wrote: -> >> ?11.01.2017, 04:24, "Bin Liu" <b-liu@ti.com>: -> >> ?> On Tue, Jan 03, 2017 at 11:25:34PM +0800, Icenowy Zheng wrote: -> >> ?>> ?Lichee Pi Zero features a USB OTG port. -> >> ?>> -> >> ?>> ?Add support for it. -> >> ?>> -> >> ?>> ?Note: in order to use the Host mode, the board must be powered via the -> >> ?>> ?+5V and GND pins. -> >> ?>> -> >> ?>> ?Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> -> >> ?>> ?--- -> >> ?>> ??arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 10 ++++++++++ -> >> ?>> ??1 file changed, 10 insertions(+) -> >> ?>> -> >> ?>> ?diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts -> >> ?>> ?index 0099affc6ce3..3d9168cbaeca 100644 -> >> ?>> ?--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts -> >> ?>> ?+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts -> >> ?>> ?@@ -71,3 +71,13 @@ -> >> ?>> ??????????pinctrl-names = "default"; -> >> ?>> ??????????status = "okay"; -> >> ?>> ??}; -> >> ?>> ?+ -> >> ?>> ?+&usb_otg { -> >> ?>> ?+ dr_mode = "otg"; -> >> ?> -> >> ?> Why not set this default mode in dtsi instead? -> >> ?> -> >> ?> Regards, -> >> ?> -Bin. +> >> 11.01.2017, 04:24, "Bin Liu" <b-liu@ti.com>: +> >> > On Tue, Jan 03, 2017 at 11:25:34PM +0800, Icenowy Zheng wrote: +> >> >> Lichee Pi Zero features a USB OTG port. +> >> >> +> >> >> Add support for it. +> >> >> +> >> >> Note: in order to use the Host mode, the board must be powered via the +> >> >> +5V and GND pins. +> >> >> +> >> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> +> >> >> --- +> >> >> arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 10 ++++++++++ +> >> >> 1 file changed, 10 insertions(+) +> >> >> +> >> >> diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts +> >> >> index 0099affc6ce3..3d9168cbaeca 100644 +> >> >> --- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts +> >> >> +++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts +> >> >> @@ -71,3 +71,13 @@ +> >> >> pinctrl-names = "default"; +> >> >> status = "okay"; +> >> >> }; +> >> >> + +> >> >> +&usb_otg { +> >> >> + dr_mode = "otg"; +> >> > +> >> > Why not set this default mode in dtsi instead? +> >> > +> >> > Regards, +> >> > -Bin. > >> -> >> ?There's possibly boards which do not have OTG functions. +> >> There's possibly boards which do not have OTG functions. > > > > That is board specific. > > @@ -62,17 +62,17 @@ Regards, > > Regards, > > -Bin. > > -> >> ?Even the official CDR design of V3s uses the USB controller to -> >> ?connect a UVC webcam to make the design a dual-cam design -> >> ?(V3s itself has a CSI). +> >> Even the official CDR design of V3s uses the USB controller to +> >> connect a UVC webcam to make the design a dual-cam design +> >> (V3s itself has a CSI). > >> -> >> ?> -> >> ?>> ?+ status = "okay"; -> >> ?>> ?+}; -> >> ?>> ?+ -> >> ?>> ?+&usbphy { -> >> ?>> ?+ usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>; -> >> ?>> ?+ status = "okay"; -> >> ?>> ?+}; -> >> ?>> ?-- -> >> ?>> ?2.11.0 +> >> > +> >> >> + status = "okay"; +> >> >> +}; +> >> >> + +> >> >> +&usbphy { +> >> >> + usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>; +> >> >> + status = "okay"; +> >> >> +}; +> >> >> -- +> >> >> 2.11.0 diff --git a/a/content_digest b/N2/content_digest index 172c886..139a3e3 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -4,10 +4,17 @@ "ref\02733831484164533@web1g.yandex.ru\0" "ref\020170111200811.GA16865@uda0271908\0" "ref\0418251484165614@web21h.yandex.ru\0" - "From\0b-liu@ti.com (Bin Liu)\0" - "Subject\0[PATCH 4/4] ARM: dts: sun8i: add OTG function to Lichee Pi Zero\0" + "From\0Bin Liu <b-liu@ti.com>\0" + "Subject\0Re: [PATCH 4/4] ARM: dts: sun8i: add OTG function to Lichee Pi Zero\0" "Date\0Wed, 11 Jan 2017 14:33:26 -0600\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Icenowy Zheng <icenowy@aosc.xyz>\0" + "Cc\0Maxime Ripard <maxime.ripard@free-electrons.com>" + Chen-Yu Tsai <wens@csie.org> + Kishon Vijay Abraham I <kishon@ti.com> + devicetree@vger.kernel.org <devicetree@vger.kernel.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> + linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> + " linux-usb@vger.kernel.org <linux-usb@vger.kernel.org>\0" "\00:1\0" "b\0" "On Thu, Jan 12, 2017 at 04:13:34AM +0800, Icenowy Zheng wrote:\n" @@ -15,38 +22,38 @@ "> \n" "> 12.01.2017, 04:08, \"Bin Liu\" <b-liu@ti.com>:\n" "> > On Thu, Jan 12, 2017 at 03:55:33AM +0800, Icenowy Zheng wrote:\n" - "> >> ?11.01.2017, 04:24, \"Bin Liu\" <b-liu@ti.com>:\n" - "> >> ?> On Tue, Jan 03, 2017 at 11:25:34PM +0800, Icenowy Zheng wrote:\n" - "> >> ?>> ?Lichee Pi Zero features a USB OTG port.\n" - "> >> ?>>\n" - "> >> ?>> ?Add support for it.\n" - "> >> ?>>\n" - "> >> ?>> ?Note: in order to use the Host mode, the board must be powered via the\n" - "> >> ?>> ?+5V and GND pins.\n" - "> >> ?>>\n" - "> >> ?>> ?Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>\n" - "> >> ?>> ?---\n" - "> >> ?>> ??arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 10 ++++++++++\n" - "> >> ?>> ??1 file changed, 10 insertions(+)\n" - "> >> ?>>\n" - "> >> ?>> ?diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" - "> >> ?>> ?index 0099affc6ce3..3d9168cbaeca 100644\n" - "> >> ?>> ?--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" - "> >> ?>> ?+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" - "> >> ?>> ?@@ -71,3 +71,13 @@\n" - "> >> ?>> ??????????pinctrl-names = \"default\";\n" - "> >> ?>> ??????????status = \"okay\";\n" - "> >> ?>> ??};\n" - "> >> ?>> ?+\n" - "> >> ?>> ?+&usb_otg {\n" - "> >> ?>> ?+ dr_mode = \"otg\";\n" - "> >> ?>\n" - "> >> ?> Why not set this default mode in dtsi instead?\n" - "> >> ?>\n" - "> >> ?> Regards,\n" - "> >> ?> -Bin.\n" + "> >> \302\24011.01.2017, 04:24, \"Bin Liu\" <b-liu@ti.com>:\n" + "> >> \302\240> On Tue, Jan 03, 2017 at 11:25:34PM +0800, Icenowy Zheng wrote:\n" + "> >> \302\240>> \302\240Lichee Pi Zero features a USB OTG port.\n" + "> >> \302\240>>\n" + "> >> \302\240>> \302\240Add support for it.\n" + "> >> \302\240>>\n" + "> >> \302\240>> \302\240Note: in order to use the Host mode, the board must be powered via the\n" + "> >> \302\240>> \302\240+5V and GND pins.\n" + "> >> \302\240>>\n" + "> >> \302\240>> \302\240Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>\n" + "> >> \302\240>> \302\240---\n" + "> >> \302\240>> \302\240\302\240arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts | 10 ++++++++++\n" + "> >> \302\240>> \302\240\302\2401 file changed, 10 insertions(+)\n" + "> >> \302\240>>\n" + "> >> \302\240>> \302\240diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" + "> >> \302\240>> \302\240index 0099affc6ce3..3d9168cbaeca 100644\n" + "> >> \302\240>> \302\240--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" + "> >> \302\240>> \302\240+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts\n" + "> >> \302\240>> \302\240@@ -71,3 +71,13 @@\n" + "> >> \302\240>> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240pinctrl-names = \"default\";\n" + "> >> \302\240>> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240status = \"okay\";\n" + "> >> \302\240>> \302\240\302\240};\n" + "> >> \302\240>> \302\240+\n" + "> >> \302\240>> \302\240+&usb_otg {\n" + "> >> \302\240>> \302\240+ dr_mode = \"otg\";\n" + "> >> \302\240>\n" + "> >> \302\240> Why not set this default mode in dtsi instead?\n" + "> >> \302\240>\n" + "> >> \302\240> Regards,\n" + "> >> \302\240> -Bin.\n" "> >>\n" - "> >> ?There's possibly boards which do not have OTG functions.\n" + "> >> \302\240There's possibly boards which do not have OTG functions.\n" "> >\n" "> > That is board specific.\n" "> >\n" @@ -74,19 +81,19 @@ "> > Regards,\n" "> > -Bin.\n" "> >\n" - "> >> ?Even the official CDR design of V3s uses the USB controller to\n" - "> >> ?connect a UVC webcam to make the design a dual-cam design\n" - "> >> ?(V3s itself has a CSI).\n" + "> >> \302\240Even the official CDR design of V3s uses the USB controller to\n" + "> >> \302\240connect a UVC webcam to make the design a dual-cam design\n" + "> >> \302\240(V3s itself has a CSI).\n" "> >>\n" - "> >> ?>\n" - "> >> ?>> ?+ status = \"okay\";\n" - "> >> ?>> ?+};\n" - "> >> ?>> ?+\n" - "> >> ?>> ?+&usbphy {\n" - "> >> ?>> ?+ usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;\n" - "> >> ?>> ?+ status = \"okay\";\n" - "> >> ?>> ?+};\n" - "> >> ?>> ?--\n" - > >> ?>> ?2.11.0 + "> >> \302\240>\n" + "> >> \302\240>> \302\240+ status = \"okay\";\n" + "> >> \302\240>> \302\240+};\n" + "> >> \302\240>> \302\240+\n" + "> >> \302\240>> \302\240+&usbphy {\n" + "> >> \302\240>> \302\240+ usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>;\n" + "> >> \302\240>> \302\240+ status = \"okay\";\n" + "> >> \302\240>> \302\240+};\n" + "> >> \302\240>> \302\240--\n" + "> >> \302\240>> \302\2402.11.0" -c8c3fa8a3069eabf5b73d066c3276ef4675af7d06080a6427ec62083a80d086f +c43c979356bf834b0b307e37e1a4bbeabc90d04041ecf51bc5bfeb43cafddff0
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