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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Marcel Apfelbaum <marcel@redhat.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH V2 0/3] hw/pcie: Introduce Generic PCI Express Root Port
Date: Thu, 12 Jan 2017 17:56:02 +0200	[thread overview]
Message-ID: <20170112173724-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <1484137136-8021-1-git-send-email-marcel@redhat.com>

On Wed, Jan 11, 2017 at 02:18:53PM +0200, Marcel Apfelbaum wrote:
> v1 -> v2:
>  - Rebased on master.
> 
> The Generic Root Port behaves the same as the
> Intel's IOH device with id 3420, without having
> Intel specific attributes.
> 
> The device has two purposes:
>  (1) Can be used on both X86 and ARM machines.
>  (2) It will allow us to tweak the behaviour
>     (e.g add vendor-specific PCI capabilities)
>      - something that obviously cannot be done
>        on a known device.
> 
> Patch 1/3: Introduce a base class for Root Ports - most of the code
>            is migrated from IOH3420 implementation.
> Patch 2/3: Derives the IOH3420 from the new base class
> Patch 3/3: Introduces the generic Root Port.
> 
> Tested with Linux and Windows guests only on x86 hosts.

So I understand how it's helpful to share code
with an existing bridge, but I worries me that
you picked up some arbitrary values from the intel chip
and promote them as a standard pcie thing.

You want to have e.g. base-pcie-root-port and
inherit that. Only put really common stuff in there.
Similar to how we do it in hw/pci/pci_bridge.c


Now we do not want to over-engineer, so I understand
how you might want to say hey I use this option
and intel does the same so we do not need a flag
for that now. And that's fine but please add a comment
to that end.

And when you do you will discover there's some stuff you
might be able to simplify, e.g. I don't yet see why
you would want AER support there.

> Marcel Apfelbaum (3):
>   hw/pcie: Introduce a base class for PCI Express Root Ports
>   hw/ioh3420: derive from PCI Express Root Port base class
>   hw/pcie: Introduce Generic PCI Express Root Port
> 
>  default-configs/arm-softmmu.mak    |   1 +
>  default-configs/i386-softmmu.mak   |   1 +
>  default-configs/x86_64-softmmu.mak |   1 +
>  hw/pci-bridge/Makefile.objs        |   1 +
>  hw/pci-bridge/ioh3420.c            | 152 ++-----------------------
>  hw/pci-bridge/pcie_root_port.c     | 228 +++++++++++++++++++++++++++++++++++++
>  include/hw/pci/pci.h               |   1 +
>  include/hw/pci/pcie_port.h         |  18 +++
>  8 files changed, 258 insertions(+), 145 deletions(-)
>  create mode 100644 hw/pci-bridge/pcie_root_port.c
> 
> -- 
> 2.5.5

  parent reply	other threads:[~2017-01-12 15:56 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-11 12:18 [Qemu-devel] [PATCH V2 0/3] hw/pcie: Introduce Generic PCI Express Root Port Marcel Apfelbaum
2017-01-11 12:18 ` [Qemu-devel] [PATCH V2 1/3] hw/pcie: Introduce a base class for PCI Express Root Ports Marcel Apfelbaum
2017-01-12 15:36   ` Michael S. Tsirkin
2017-01-12 15:51     ` Marcel Apfelbaum
2017-01-11 12:18 ` [Qemu-devel] [PATCH V2 2/3] hw/ioh3420: derive from PCI Express Root Port base class Marcel Apfelbaum
2017-01-11 12:18 ` [Qemu-devel] [PATCH V2 3/3] hw/pcie: Introduce Generic PCI Express Root Port Marcel Apfelbaum
2017-01-12 15:56 ` Michael S. Tsirkin [this message]
2017-01-12 16:05   ` [Qemu-devel] [PATCH V2 0/3] " Marcel Apfelbaum
2017-01-12 16:20     ` Michael S. Tsirkin
2017-01-12 16:23       ` Marcel Apfelbaum
2017-01-12 16:46         ` Michael S. Tsirkin
2017-01-13  8:35         ` Gerd Hoffmann
2017-01-15 16:59           ` Marcel Apfelbaum
2017-01-16 16:46 ` Andrea Bolognani
2017-01-18 12:30   ` Marcel Apfelbaum

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