From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 3/4] drm/i915: Fix calculation of rotated x and y offsets for planar formats Date: Fri, 20 Jan 2017 17:00:14 +0200 Message-ID: <20170120150014.GF31595@intel.com> References: <1484922525-6131-1-git-send-email-ander.conselvan.de.oliveira@intel.com> <1484922525-6131-3-git-send-email-ander.conselvan.de.oliveira@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id A5E3B6EBC7 for ; Fri, 20 Jan 2017 15:00:21 +0000 (UTC) Content-Disposition: inline In-Reply-To: <1484922525-6131-3-git-send-email-ander.conselvan.de.oliveira@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Ander Conselvan de Oliveira Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org, stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org T24gRnJpLCBKYW4gMjAsIDIwMTcgYXQgMDQ6Mjg6NDRQTSArMDIwMCwgQW5kZXIgQ29uc2VsdmFu IGRlIE9saXZlaXJhIHdyb3RlOgo+IFBhcmFtZXRlcnMgdGlsZV9zaXplLCB0aWxlX3dpZHRoIGFu ZCB0aWxlX2hlaWdodCB3ZXJlIHBhc3NlZCBpbiB0aGUKPiB3cm9uZyBvcmRlciB0byBfaW50ZWxf YWRqdXN0X3RpbGVfb2Zmc2V0KCkgd2hlbiBjYWxjdWxhdGluZyB0aGUgcm90YXRlZAo+IG9mZnNl dHMuCj4gCj4gVGhpcyBkb2Vzbid0IGZpeCBhbnkgdXNlciB2aXNpYmxlIGJ1Zywgc2luY2UgZm9y IHBhY2thZ2VkIGZvcm1hdHMgbmV3Cj4gYW5kIG9sZCBvZmZzZXQgYXJlIHRoZSBzYW1lIGFuZCB0 aGUgcm90YXRlZCBvZmZzZXRzIGFyZSB3aXRoaW4gYSB0aWxlCj4gYmVmb3JlIHRoZXkgYXJlIGZl ZCB0byBfaW50ZWxfYWRqdXN0X3RpbGVfb2Zmc2V0KCkuIEluIHRoYXQgY2FzZSwgdGhlCj4gb2Zm c2V0cyBhcmUgdW5jaGFuZ2VkLiBUaGF0IGlzIG5vdCB0cnVlIGZvciBwbGFuYXIgZm9ybWF0cywg YnV0IHRob3NlCj4gYXJlIGN1cnJlbnRseSBub3Qgc3VwcG9ydGVkLgo+IAo+IEZvdW5kIGJ5IGNv dmVyaXR5Lgo+IAo+IEZpeGVzOiA2NmEyZDkyN2NiMGUgKCJkcm0vaTkxNTogTWFrZSBpbnRlbF9h ZGp1c3RfdGlsZV9vZmZzZXQoKSB3b3JrIGZvciBsaW5lYXIgYnVmZmVycyIpCj4gQ2M6IFZpbGxl IFN5cmrDpGzDpCA8dmlsbGUuc3lyamFsYUBsaW51eC5pbnRlbC5jb20+Cj4gQ2M6IFNpdmFrdW1h ciBUaHVsYXNpbWFuaSA8c2l2YWt1bWFyLnRodWxhc2ltYW5pQGludGVsLmNvbT4KPiBDYzogRGFu aWVsIFZldHRlciA8ZGFuaWVsLnZldHRlckBpbnRlbC5jb20+Cj4gQ2M6IEphbmkgTmlrdWxhIDxq YW5pLm5pa3VsYUBsaW51eC5pbnRlbC5jb20+Cj4gQ2M6IGludGVsLWdmeEBsaXN0cy5mcmVlZGVz a3RvcC5vcmcKPiBDYzogPHN0YWJsZUB2Z2VyLmtlcm5lbC5vcmc+ICMgdjQuOSsKPiBTaWduZWQt b2ZmLWJ5OiBBbmRlciBDb25zZWx2YW4gZGUgT2xpdmVpcmEgPGFuZGVyLmNvbnNlbHZhbi5kZS5v bGl2ZWlyYUBpbnRlbC5jb20+CgpSZXZpZXdlZC1ieTogVmlsbGUgU3lyasOkbMOkIDx2aWxsZS5z eXJqYWxhQGxpbnV4LmludGVsLmNvbT4KCi9tZSBzaG91bGQgcmVhbGx5IGRpZyB1cCB3aGF0ZXZl ciBmYiBvZmZzZXQgdGVzdHMgSSBoYWQgd3JpdHRlbiBlYXJsaWVyCmFuZCB0cnkgdG8gZmluaXNo IHRoZW4uLi4KCj4gLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rpc3BsYXkuYyB8 IDUgKysrLS0KPiAgMSBmaWxlIGNoYW5nZWQsIDMgaW5zZXJ0aW9ucygrKSwgMiBkZWxldGlvbnMo LSkKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZGlzcGxheS5j IGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZGlzcGxheS5jCj4gaW5kZXggYmRkYWRkOS4u MDc1OWU4YiAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kaXNwbGF5 LmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kaXNwbGF5LmMKPiBAQCAtMjU3 OCw4ICsyNTc4LDkgQEAgaW50ZWxfZmlsbF9mYl9pbmZvKHN0cnVjdCBkcm1faTkxNV9wcml2YXRl ICpkZXZfcHJpdiwKPiAgCQkJICogV2Ugb25seSBrZWVwIHRoZSB4L3kgb2Zmc2V0cywgc28gcHVz aCBhbGwgb2YgdGhlCj4gIAkJCSAqIGd0dCBvZmZzZXQgaW50byB0aGUgeC95IG9mZnNldHMuCj4g IAkJCSAqLwo+IC0JCQlfaW50ZWxfYWRqdXN0X3RpbGVfb2Zmc2V0KCZ4LCAmeSwgdGlsZV9zaXpl LAo+IC0JCQkJCQkgIHRpbGVfd2lkdGgsIHRpbGVfaGVpZ2h0LCBwaXRjaF90aWxlcywKPiArCQkJ X2ludGVsX2FkanVzdF90aWxlX29mZnNldCgmeCwgJnksCj4gKwkJCQkJCSAgdGlsZV93aWR0aCwg dGlsZV9oZWlnaHQsCj4gKwkJCQkJCSAgdGlsZV9zaXplLCBwaXRjaF90aWxlcywKPiAgCQkJCQkJ ICBndHRfb2Zmc2V0X3JvdGF0ZWQgKiB0aWxlX3NpemUsIDApOwo+ICAKPiAgCQkJZ3R0X29mZnNl dF9yb3RhdGVkICs9IHJvdF9pbmZvLT5wbGFuZVtpXS53aWR0aCAqIHJvdF9pbmZvLT5wbGFuZVtp XS5oZWlnaHQ7Cj4gLS0gCj4gMi41LjUKCi0tIApWaWxsZSBTeXJqw6Rsw6QKSW50ZWwgT1RDCl9f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBt YWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3Rz LmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com ([192.55.52.115]:36536 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752557AbdATPAW (ORCPT ); Fri, 20 Jan 2017 10:00:22 -0500 Date: Fri, 20 Jan 2017 17:00:14 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Ander Conselvan de Oliveira Cc: intel-gfx@lists.freedesktop.org, Sivakumar Thulasimani , Daniel Vetter , Jani Nikula , stable@vger.kernel.org Subject: Re: [PATCH 3/4] drm/i915: Fix calculation of rotated x and y offsets for planar formats Message-ID: <20170120150014.GF31595@intel.com> References: <1484922525-6131-1-git-send-email-ander.conselvan.de.oliveira@intel.com> <1484922525-6131-3-git-send-email-ander.conselvan.de.oliveira@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1484922525-6131-3-git-send-email-ander.conselvan.de.oliveira@intel.com> Sender: stable-owner@vger.kernel.org List-ID: On Fri, Jan 20, 2017 at 04:28:44PM +0200, Ander Conselvan de Oliveira wrote: > Parameters tile_size, tile_width and tile_height were passed in the > wrong order to _intel_adjust_tile_offset() when calculating the rotated > offsets. > > This doesn't fix any user visible bug, since for packaged formats new > and old offset are the same and the rotated offsets are within a tile > before they are fed to _intel_adjust_tile_offset(). In that case, the > offsets are unchanged. That is not true for planar formats, but those > are currently not supported. > > Found by coverity. > > Fixes: 66a2d927cb0e ("drm/i915: Make intel_adjust_tile_offset() work for linear buffers") > Cc: Ville Syrj�l� > Cc: Sivakumar Thulasimani > Cc: Daniel Vetter > Cc: Jani Nikula > Cc: intel-gfx@lists.freedesktop.org > Cc: # v4.9+ > Signed-off-by: Ander Conselvan de Oliveira Reviewed-by: Ville Syrj�l� /me should really dig up whatever fb offset tests I had written earlier and try to finish then... > --- > drivers/gpu/drm/i915/intel_display.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index bddadd9..0759e8b 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2578,8 +2578,9 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv, > * We only keep the x/y offsets, so push all of the > * gtt offset into the x/y offsets. > */ > - _intel_adjust_tile_offset(&x, &y, tile_size, > - tile_width, tile_height, pitch_tiles, > + _intel_adjust_tile_offset(&x, &y, > + tile_width, tile_height, > + tile_size, pitch_tiles, > gtt_offset_rotated * tile_size, 0); > > gtt_offset_rotated += rot_info->plane[i].width * rot_info->plane[i].height; > -- > 2.5.5 -- Ville Syrj�l� Intel OTC