From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751319AbdAVJkj (ORCPT ); Sun, 22 Jan 2017 04:40:39 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:35784 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750770AbdAVJkd (ORCPT ); Sun, 22 Jan 2017 04:40:33 -0500 Date: Sun, 22 Jan 2017 10:33:19 +0100 From: Ingo Molnar To: Len Brown Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Len Brown , Thomas Gleixner Subject: Re: [PATCH] x86 tsc: Add the Intel Denverton Processor to native_calibrate_tsc() Message-ID: <20170122093319.GB1610@gmail.com> References: <306899f94804aece6d8fa8b4223ede3b48dbb59c.1484985086.git.len.brown@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <306899f94804aece6d8fa8b4223ede3b48dbb59c.1484985086.git.len.brown@intel.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Len Brown wrote: > From: Len Brown > > The Intel Denverton microserver uses a 25 MHz TSC crystal, > so we can derive its exact * TSC frequency > using CPUID and some arithmetic, eg. > > TSC: 1800 MHz (25000000 Hz * 216 / 3 / 1000000) > > * 'exact' is only as good as the crystal, which should be +/- 20ppm > > Signed-off-by: Len Brown > --- > arch/x86/kernel/tsc.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c > index 46b2f41f8b05..b3e397a0f29d 100644 > --- a/arch/x86/kernel/tsc.c > +++ b/arch/x86/kernel/tsc.c > @@ -694,6 +694,7 @@ unsigned long native_calibrate_tsc(void) > crystal_khz = 24000; /* 24.0 MHz */ > break; > case INTEL_FAM6_SKYLAKE_X: > + case INTEL_FAM6_ATOM_DENVERTON: > crystal_khz = 25000; /* 25.0 MHz */ > break; > case INTEL_FAM6_ATOM_GOLDMONT: Already upstream, as per: 695085b4bc76 x86/tsc: Add the Intel Denverton Processor to native_calibrate_tsc() Thanks, Ingo