From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Thu, 26 Jan 2017 16:18:46 -0800 From: Stephen Boyd To: Leo Yan Cc: Michael Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Guodong Xu , Haojian Zhuang , John Stultz Subject: Re: [PATCH v2] clk: hisilicon: fix lock assignment Message-ID: <20170127001846.GV8801@codeaurora.org> References: <1484965591-743-1-git-send-email-leo.yan@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <1484965591-743-1-git-send-email-leo.yan@linaro.org> List-ID: On 01/21, Leo Yan wrote: > In clock driver initialize phase the spinlock is missed to assignment > to struct clkgate_separated, finally there have no locking to protect > exclusive accessing for clock registers. > > This bug introduces the console has no output after enable coresight > driver on 96boards Hikey; this is because console using UART3, which > has shared the same register with coresight clock enabling bit. After > applied this patch it can assign lock properly to protect exclusive > accessing, and console can work well after enabled coresight modules. > > Fixes: 0aa0c95f743a ("clk: hisilicon: add common clock support") > Signed-off-by: Leo Yan > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project