From mboxrd@z Thu Jan 1 00:00:00 1970 From: John Keeping Subject: [PATCH v3 09/24] drm/rockchip: dw-mipi-dsi: only request HS clock when required Date: Sun, 29 Jan 2017 13:24:29 +0000 Message-ID: <20170129132444.25251-10-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170129132444.25251-1-john@metanate.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Mark Yao Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org UmVxdWVzdGluZyB0aGUgSFMgY2xvY2sgZnJvbSB0aGUgUEhZIGJlZm9yZSB3ZSBpbml0aWFsaXpl IGl0IGNhdXNlcyBhbgppbnZhbGlkIHNpZ25hbCB0byBiZSBzZW50IG91dCBzaW5jZSB0aGUgaW5w dXQgY2xvY2sgaXMgbm90IHlldApjb25maWd1cmVkLiAgVGhlIFBIWSBkYXRhYm9vayBzdWdnZXN0 cyBvbmx5IGFzc2VydGluZyB0aGlzIHNpZ25hbCB3aGVuCnBlcmZvcm1pbmcgSFMgdHJhbnNmZXJz LCBzbyBsZXQncyBkbyB0aGF0LgoKU2lnbmVkLW9mZi1ieTogSm9obiBLZWVwaW5nIDxqb2huQG1l dGFuYXRlLmNvbT4KUmV2aWV3ZWQtYnk6IENocmlzIFpob25nIDx6eXdAcm9jay1jaGlwcy5jb20+ Ci0tLQp2MzoKLSBBZGQgQ2hyaXMnIFJldmlld2VkLWJ5ClVuY2hhbmdlZCBpbiB2MgoKIGRyaXZl cnMvZ3B1L2RybS9yb2NrY2hpcC9kdy1taXBpLWRzaS5jIHwgNiArKysrLS0KIDEgZmlsZSBjaGFu Z2VkLCA0IGluc2VydGlvbnMoKyksIDIgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvZHJpdmVy cy9ncHUvZHJtL3JvY2tjaGlwL2R3LW1pcGktZHNpLmMgYi9kcml2ZXJzL2dwdS9kcm0vcm9ja2No aXAvZHctbWlwaS1kc2kuYwppbmRleCAxNWQzM2MzYzhjYjcuLjAzZmMwOTZmZTFiZCAxMDA2NDQK LS0tIGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL2R3LW1pcGktZHNpLmMKKysrIGIvZHJpdmVy cy9ncHUvZHJtL3JvY2tjaGlwL2R3LW1pcGktZHNpLmMKQEAgLTU0NSwxMyArNTQ1LDE1IEBAIHN0 YXRpYyBpbnQgZHdfbWlwaV9kc2lfaG9zdF9kZXRhY2goc3RydWN0IG1pcGlfZHNpX2hvc3QgKmhv c3QsCiBzdGF0aWMgdm9pZCBkd19taXBpX21lc3NhZ2VfY29uZmlnKHN0cnVjdCBkd19taXBpX2Rz aSAqZHNpLAogCQkJCSAgIGNvbnN0IHN0cnVjdCBtaXBpX2RzaV9tc2cgKm1zZykKIHsKKwlib29s IGxwbSA9IG1zZy0+ZmxhZ3MgJiBNSVBJX0RTSV9NU0dfVVNFX0xQTTsKIAl1MzIgdmFsID0gMDsK IAogCWlmIChtc2ctPmZsYWdzICYgTUlQSV9EU0lfTVNHX1JFUV9BQ0spCiAJCXZhbCB8PSBFTl9B Q0tfUlFTVDsKLQlpZiAobXNnLT5mbGFncyAmIE1JUElfRFNJX01TR19VU0VfTFBNKQorCWlmIChs cG0pCiAJCXZhbCB8PSBDTURfTU9ERV9BTExfTFA7CiAKKwlkc2lfd3JpdGUoZHNpLCBEU0lfTFBD TEtfQ1RSTCwgbHBtID8gMCA6IFBIWV9UWFJFUVVFU1RDTEtIUyk7CiAJZHNpX3dyaXRlKGRzaSwg RFNJX0NNRF9NT0RFX0NGRywgdmFsKTsKIH0KIApAQCAtNjkzLDYgKzY5NSw3IEBAIHN0YXRpYyB2 b2lkIGR3X21pcGlfZHNpX3NldF9tb2RlKHN0cnVjdCBkd19taXBpX2RzaSAqZHNpLAogCQlkc2lf d3JpdGUoZHNpLCBEU0lfUFdSX1VQLCBSRVNFVCk7CiAJCWRzaV93cml0ZShkc2ksIERTSV9NT0RF X0NGRywgRU5BQkxFX1ZJREVPX01PREUpOwogCQlkd19taXBpX2RzaV92aWRlb19tb2RlX2NvbmZp Zyhkc2kpOworCQlkc2lfd3JpdGUoZHNpLCBEU0lfTFBDTEtfQ1RSTCwgUEhZX1RYUkVRVUVTVENM S0hTKTsKIAkJZHNpX3dyaXRlKGRzaSwgRFNJX1BXUl9VUCwgUE9XRVJVUCk7CiAJfQogfQpAQCAt NzEwLDcgKzcxMyw2IEBAIHN0YXRpYyB2b2lkIGR3X21pcGlfZHNpX2luaXQoc3RydWN0IGR3X21p cGlfZHNpICpkc2kpCiAJCSAgfCBQSFlfUlNUWiB8IFBIWV9TSFVURE9XTlopOwogCWRzaV93cml0 ZShkc2ksIERTSV9DTEtNR1JfQ0ZHLCBUT19DTEtfRElWSURTSU9OKDEwKSB8CiAJCSAgVFhfRVND X0NMS19ESVZJRFNJT04oNykpOwotCWRzaV93cml0ZShkc2ksIERTSV9MUENMS19DVFJMLCBQSFlf VFhSRVFVRVNUQ0xLSFMpOwogfQogCiBzdGF0aWMgdm9pZCBkd19taXBpX2RzaV9kcGlfY29uZmln KHN0cnVjdCBkd19taXBpX2RzaSAqZHNpLAotLSAKMi4xMS4wLjE5Ny5nYjU1NmRlNS5kaXJ0eQoK X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: john@metanate.com (John Keeping) Date: Sun, 29 Jan 2017 13:24:29 +0000 Subject: [PATCH v3 09/24] drm/rockchip: dw-mipi-dsi: only request HS clock when required In-Reply-To: <20170129132444.25251-1-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> Message-ID: <20170129132444.25251-10-john@metanate.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Requesting the HS clock from the PHY before we initialize it causes an invalid signal to be sent out since the input clock is not yet configured. The PHY databook suggests only asserting this signal when performing HS transfers, so let's do that. Signed-off-by: John Keeping Reviewed-by: Chris Zhong --- v3: - Add Chris' Reviewed-by Unchanged in v2 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 15d33c3c8cb7..03fc096fe1bd 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -545,13 +545,15 @@ static int dw_mipi_dsi_host_detach(struct mipi_dsi_host *host, static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, const struct mipi_dsi_msg *msg) { + bool lpm = msg->flags & MIPI_DSI_MSG_USE_LPM; u32 val = 0; if (msg->flags & MIPI_DSI_MSG_REQ_ACK) val |= EN_ACK_RQST; - if (msg->flags & MIPI_DSI_MSG_USE_LPM) + if (lpm) val |= CMD_MODE_ALL_LP; + dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); dsi_write(dsi, DSI_CMD_MODE_CFG, val); } @@ -693,6 +695,7 @@ static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, dsi_write(dsi, DSI_PWR_UP, RESET); dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE); dw_mipi_dsi_video_mode_config(dsi); + dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); dsi_write(dsi, DSI_PWR_UP, POWERUP); } } @@ -710,7 +713,6 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) | PHY_RSTZ | PHY_SHUTDOWNZ); dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) | TX_ESC_CLK_DIVIDSION(7)); - dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); } static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi, -- 2.11.0.197.gb556de5.dirty From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751511AbdA2OJI (ORCPT ); Sun, 29 Jan 2017 09:09:08 -0500 Received: from dougal.metanate.com ([90.155.101.14]:56643 "EHLO metanate.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751419AbdA2OJG (ORCPT ); Sun, 29 Jan 2017 09:09:06 -0500 From: John Keeping To: Mark Yao Cc: Chris Zhong , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, John Keeping Subject: [PATCH v3 09/24] drm/rockchip: dw-mipi-dsi: only request HS clock when required Date: Sun, 29 Jan 2017 13:24:29 +0000 Message-Id: <20170129132444.25251-10-john@metanate.com> X-Mailer: git-send-email 2.11.0.197.gb556de5.dirty In-Reply-To: <20170129132444.25251-1-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Requesting the HS clock from the PHY before we initialize it causes an invalid signal to be sent out since the input clock is not yet configured. The PHY databook suggests only asserting this signal when performing HS transfers, so let's do that. Signed-off-by: John Keeping Reviewed-by: Chris Zhong --- v3: - Add Chris' Reviewed-by Unchanged in v2 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 15d33c3c8cb7..03fc096fe1bd 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -545,13 +545,15 @@ static int dw_mipi_dsi_host_detach(struct mipi_dsi_host *host, static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, const struct mipi_dsi_msg *msg) { + bool lpm = msg->flags & MIPI_DSI_MSG_USE_LPM; u32 val = 0; if (msg->flags & MIPI_DSI_MSG_REQ_ACK) val |= EN_ACK_RQST; - if (msg->flags & MIPI_DSI_MSG_USE_LPM) + if (lpm) val |= CMD_MODE_ALL_LP; + dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); dsi_write(dsi, DSI_CMD_MODE_CFG, val); } @@ -693,6 +695,7 @@ static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, dsi_write(dsi, DSI_PWR_UP, RESET); dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE); dw_mipi_dsi_video_mode_config(dsi); + dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); dsi_write(dsi, DSI_PWR_UP, POWERUP); } } @@ -710,7 +713,6 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) | PHY_RSTZ | PHY_SHUTDOWNZ); dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) | TX_ESC_CLK_DIVIDSION(7)); - dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS); } static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi, -- 2.11.0.197.gb556de5.dirty