From mboxrd@z Thu Jan 1 00:00:00 1970 From: John Keeping Subject: [PATCH v3 14/24] drm/rockchip: dw-mipi-dsi: ensure PHY is reset Date: Sun, 29 Jan 2017 13:24:34 +0000 Message-ID: <20170129132444.25251-15-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170129132444.25251-1-john@metanate.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Mark Yao Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org QWxzbyBkb24ndCBwb3dlciB1cCB0aGUgRFNJIGhvc3QgYXQgdGhpcyBwb2ludCBzaW5jZSB0aGlz IGlzIG5vdApuZWNlc3NhcnkgaW4gb3JkZXIgdG8gY29uZmlndXJlIHRoZSBQSFkgYW5kIHdlIGRv IHNvIGxhdGVyIHdoZW4Kc2VsZWN0aW5nIHZpZGVvIG9yIGNvbW1hbmQgbW9kZS4KClNpZ25lZC1v ZmYtYnk6IEpvaG4gS2VlcGluZyA8am9obkBtZXRhbmF0ZS5jb20+ClJldmlld2VkLWJ5OiBDaHJp cyBaaG9uZyA8enl3QHJvY2stY2hpcHMuY29tPgotLS0KdjM6Ci0gQWRkIENocmlzJyBSZXZpZXdl ZC1ieQpVbmNoYW5nZWQgaW4gdjIKCiBkcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvZHctbWlwaS1k c2kuYyB8IDUgKysrKy0KIDEgZmlsZSBjaGFuZ2VkLCA0IGluc2VydGlvbnMoKyksIDEgZGVsZXRp b24oLSkKCmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvZHctbWlwaS1kc2ku YyBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9kdy1taXBpLWRzaS5jCmluZGV4IGMyZTBiYTk2 ZTBhMC4uNWIzMDY4ZTllOGRiIDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAv ZHctbWlwaS1kc2kuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvZHctbWlwaS1kc2ku YwpAQCAtMzk3LDcgKzM5NywxMCBAQCBzdGF0aWMgaW50IGR3X21pcGlfZHNpX3BoeV9pbml0KHN0 cnVjdCBkd19taXBpX2RzaSAqZHNpKQogCQlyZXR1cm4gdGVzdGRpbjsKIAl9CiAKLQlkc2lfd3Jp dGUoZHNpLCBEU0lfUFdSX1VQLCBQT1dFUlVQKTsKKwkvKiBTdGFydCBieSBjbGVhcmluZyBQSFkg c3RhdGUgKi8KKwlkc2lfd3JpdGUoZHNpLCBEU0lfUEhZX1RTVF9DVFJMMCwgUEhZX1VOVEVTVENM Uik7CisJZHNpX3dyaXRlKGRzaSwgRFNJX1BIWV9UU1RfQ1RSTDAsIFBIWV9URVNUQ0xSKTsKKwlk c2lfd3JpdGUoZHNpLCBEU0lfUEhZX1RTVF9DVFJMMCwgUEhZX1VOVEVTVENMUik7CiAKIAlkd19t aXBpX2RzaV9waHlfd3JpdGUoZHNpLCAweDEwLCBCWVBBU1NfVkNPX1JBTkdFIHwKIAkJCQkJIFZD T19SQU5HRV9DT05fU0VMKHZjbykgfAotLSAKMi4xMS4wLjE5Ny5nYjU1NmRlNS5kaXJ0eQoKX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1h aWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMu ZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: john@metanate.com (John Keeping) Date: Sun, 29 Jan 2017 13:24:34 +0000 Subject: [PATCH v3 14/24] drm/rockchip: dw-mipi-dsi: ensure PHY is reset In-Reply-To: <20170129132444.25251-1-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> Message-ID: <20170129132444.25251-15-john@metanate.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Also don't power up the DSI host at this point since this is not necessary in order to configure the PHY and we do so later when selecting video or command mode. Signed-off-by: John Keeping Reviewed-by: Chris Zhong --- v3: - Add Chris' Reviewed-by Unchanged in v2 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index c2e0ba96e0a0..5b3068e9e8db 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -397,7 +397,10 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi) return testdin; } - dsi_write(dsi, DSI_PWR_UP, POWERUP); + /* Start by clearing PHY state */ + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR); + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE | VCO_RANGE_CON_SEL(vco) | -- 2.11.0.197.gb556de5.dirty From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751268AbdA2OIM (ORCPT ); Sun, 29 Jan 2017 09:08:12 -0500 Received: from dougal.metanate.com ([90.155.101.14]:22820 "EHLO metanate.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751212AbdA2OIK (ORCPT ); Sun, 29 Jan 2017 09:08:10 -0500 From: John Keeping To: Mark Yao Cc: Chris Zhong , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, John Keeping Subject: [PATCH v3 14/24] drm/rockchip: dw-mipi-dsi: ensure PHY is reset Date: Sun, 29 Jan 2017 13:24:34 +0000 Message-Id: <20170129132444.25251-15-john@metanate.com> X-Mailer: git-send-email 2.11.0.197.gb556de5.dirty In-Reply-To: <20170129132444.25251-1-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Also don't power up the DSI host at this point since this is not necessary in order to configure the PHY and we do so later when selecting video or command mode. Signed-off-by: John Keeping Reviewed-by: Chris Zhong --- v3: - Add Chris' Reviewed-by Unchanged in v2 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index c2e0ba96e0a0..5b3068e9e8db 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -397,7 +397,10 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi) return testdin; } - dsi_write(dsi, DSI_PWR_UP, POWERUP); + /* Start by clearing PHY state */ + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR); + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE | VCO_RANGE_CON_SEL(vco) | -- 2.11.0.197.gb556de5.dirty