From mboxrd@z Thu Jan 1 00:00:00 1970 From: John Keeping Subject: [PATCH v3 02/24] drm/rockchip: dw-mipi-dsi: pass mode in where needed Date: Sun, 29 Jan 2017 13:24:22 +0000 Message-ID: <20170129132444.25251-3-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170129132444.25251-1-john@metanate.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Mark Yao Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org VGhpcyBzaG93cyB0aGF0IHdlIG9ubHkgdXNlIHRoZSBtb2RlIGZyb20gdGhlIGVuYWJsZSBmdW5j dGlvbiBhbmQKcHJlcGFyZXMgdXMgdG8gcmVtb3ZlIHRoZSAibW9kZSIgZmllbGQgYW5kIHRoZSBt b2RlX3NldCBob29rIGluIHRoZSBuZXh0CmNvbW1pdC4KClNpZ25lZC1vZmYtYnk6IEpvaG4gS2Vl cGluZyA8am9obkBtZXRhbmF0ZS5jb20+ClJldmlld2VkLWJ5OiBDaHJpcyBaaG9uZyA8enl3QHJv Y2stY2hpcHMuY29tPgotLS0KdjM6Ci0gQWRkIENocmlzJyBSZXZpZXdlZC1ieQpOZXcgaW4gdjIK CiBkcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvZHctbWlwaS1kc2kuYyB8IDQxICsrKysrKysrKysr KysrKysrKy0tLS0tLS0tLS0tLS0tLS0KIDEgZmlsZSBjaGFuZ2VkLCAyMiBpbnNlcnRpb25zKCsp LCAxOSBkZWxldGlvbnMoLSkKCmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAv ZHctbWlwaS1kc2kuYyBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9kdy1taXBpLWRzaS5jCmlu ZGV4IGJiZDk5MjI5OWY3My4uY2RiZDI1MDg3ZTgzIDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9k cm0vcm9ja2NoaXAvZHctbWlwaS1kc2kuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAv ZHctbWlwaS1kc2kuYwpAQCAtMzMwLDExICszMzAsMTEgQEAgc3RhdGljIGludCBtYXhfbWJwc190 b190ZXN0ZGluKHVuc2lnbmVkIGludCBtYXhfbWJwcykKICAqIFRoZSBjb250cm9sbGVyIHNob3Vs ZCBnZW5lcmF0ZSAyIGZyYW1lcyBiZWZvcmUKICAqIHByZXBhcmluZyB0aGUgcGVyaXBoZXJhbC4K ICAqLwotc3RhdGljIHZvaWQgZHdfbWlwaV9kc2lfd2FpdF9mb3JfdHdvX2ZyYW1lcyhzdHJ1Y3Qg ZHdfbWlwaV9kc2kgKmRzaSkKK3N0YXRpYyB2b2lkIGR3X21pcGlfZHNpX3dhaXRfZm9yX3R3b19m cmFtZXMoc3RydWN0IGRybV9kaXNwbGF5X21vZGUgKm1vZGUpCiB7CiAJaW50IHJlZnJlc2gsIHR3 b19mcmFtZXM7CiAKLQlyZWZyZXNoID0gZHJtX21vZGVfdnJlZnJlc2goZHNpLT5tb2RlKTsKKwly ZWZyZXNoID0gZHJtX21vZGVfdnJlZnJlc2gobW9kZSk7CiAJdHdvX2ZyYW1lcyA9IERJVl9ST1VO RF9VUChNU0VDX1BFUl9TRUMsIHJlZnJlc2gpICogMjsKIAltc2xlZXAodHdvX2ZyYW1lcyk7CiB9 CkBAIC00NTksNyArNDU5LDggQEAgc3RhdGljIGludCBkd19taXBpX2RzaV9waHlfaW5pdChzdHJ1 Y3QgZHdfbWlwaV9kc2kgKmRzaSkKIAlyZXR1cm4gcmV0OwogfQogCi1zdGF0aWMgaW50IGR3X21p cGlfZHNpX2dldF9sYW5lX2JwcyhzdHJ1Y3QgZHdfbWlwaV9kc2kgKmRzaSkKK3N0YXRpYyBpbnQg ZHdfbWlwaV9kc2lfZ2V0X2xhbmVfYnBzKHN0cnVjdCBkd19taXBpX2RzaSAqZHNpLAorCQkJCSAg ICBzdHJ1Y3QgZHJtX2Rpc3BsYXlfbW9kZSAqbW9kZSkKIHsKIAl1bnNpZ25lZCBpbnQgaSwgcHJl OwogCXVuc2lnbmVkIGxvbmcgbXBjbGssIHBsbHJlZiwgdG1wOwpAQCAtNDc0LDcgKzQ3NSw3IEBA IHN0YXRpYyBpbnQgZHdfbWlwaV9kc2lfZ2V0X2xhbmVfYnBzKHN0cnVjdCBkd19taXBpX2RzaSAq ZHNpKQogCQlyZXR1cm4gYnBwOwogCX0KIAotCW1wY2xrID0gRElWX1JPVU5EX1VQKGRzaS0+bW9k ZS0+Y2xvY2ssIE1TRUNfUEVSX1NFQyk7CisJbXBjbGsgPSBESVZfUk9VTkRfVVAobW9kZS0+Y2xv Y2ssIE1TRUNfUEVSX1NFQyk7CiAJaWYgKG1wY2xrKSB7CiAJCS8qIHRha2UgMSAvIDAuOSwgc2lu Y2UgbWJwcyBtdXN0IGJpZyB0aGFuIGJhbmR3aWR0aCBvZiBSR0IgKi8KIAkJdG1wID0gbXBjbGsg KiAoYnBwIC8gZHNpLT5sYW5lcykgKiAxMCAvIDk7CkBAIC03NDIsNDMgKzc0Myw0NCBAQCBzdGF0 aWMgdm9pZCBkd19taXBpX2RzaV9jb21tYW5kX21vZGVfY29uZmlnKHN0cnVjdCBkd19taXBpX2Rz aSAqZHNpKQogCiAvKiBHZXQgbGFuZSBieXRlIGNsb2NrIGN5Y2xlcy4gKi8KIHN0YXRpYyB1MzIg ZHdfbWlwaV9kc2lfZ2V0X2hjb21wb25lbnRfbGJjYyhzdHJ1Y3QgZHdfbWlwaV9kc2kgKmRzaSwK KwkJCQkJICAgc3RydWN0IGRybV9kaXNwbGF5X21vZGUgKm1vZGUsCiAJCQkJCSAgIHUzMiBoY29t cG9uZW50KQogewogCXUzMiBmcmFjLCBsYmNjOwogCiAJbGJjYyA9IGhjb21wb25lbnQgKiBkc2kt PmxhbmVfbWJwcyAqIE1TRUNfUEVSX1NFQyAvIDg7CiAKLQlmcmFjID0gbGJjYyAlIGRzaS0+bW9k ZS0+Y2xvY2s7Ci0JbGJjYyA9IGxiY2MgLyBkc2ktPm1vZGUtPmNsb2NrOworCWZyYWMgPSBsYmNj ICUgbW9kZS0+Y2xvY2s7CisJbGJjYyA9IGxiY2MgLyBtb2RlLT5jbG9jazsKIAlpZiAoZnJhYykK IAkJbGJjYysrOwogCiAJcmV0dXJuIGxiY2M7CiB9CiAKLXN0YXRpYyB2b2lkIGR3X21pcGlfZHNp X2xpbmVfdGltZXJfY29uZmlnKHN0cnVjdCBkd19taXBpX2RzaSAqZHNpKQorc3RhdGljIHZvaWQg ZHdfbWlwaV9kc2lfbGluZV90aW1lcl9jb25maWcoc3RydWN0IGR3X21pcGlfZHNpICpkc2ksCisJ CQkJCSAgc3RydWN0IGRybV9kaXNwbGF5X21vZGUgKm1vZGUpCiB7CiAJdTMyIGh0b3RhbCwgaHNh LCBoYnAsIGxiY2M7Ci0Jc3RydWN0IGRybV9kaXNwbGF5X21vZGUgKm1vZGUgPSBkc2ktPm1vZGU7 CiAKIAlodG90YWwgPSBtb2RlLT5odG90YWw7CiAJaHNhID0gbW9kZS0+aHN5bmNfZW5kIC0gbW9k ZS0+aHN5bmNfc3RhcnQ7CiAJaGJwID0gbW9kZS0+aHRvdGFsIC0gbW9kZS0+aHN5bmNfZW5kOwog Ci0JbGJjYyA9IGR3X21pcGlfZHNpX2dldF9oY29tcG9uZW50X2xiY2MoZHNpLCBodG90YWwpOwor CWxiY2MgPSBkd19taXBpX2RzaV9nZXRfaGNvbXBvbmVudF9sYmNjKGRzaSwgbW9kZSwgaHRvdGFs KTsKIAlkc2lfd3JpdGUoZHNpLCBEU0lfVklEX0hMSU5FX1RJTUUsIGxiY2MpOwogCi0JbGJjYyA9 IGR3X21pcGlfZHNpX2dldF9oY29tcG9uZW50X2xiY2MoZHNpLCBoc2EpOworCWxiY2MgPSBkd19t aXBpX2RzaV9nZXRfaGNvbXBvbmVudF9sYmNjKGRzaSwgbW9kZSwgaHNhKTsKIAlkc2lfd3JpdGUo ZHNpLCBEU0lfVklEX0hTQV9USU1FLCBsYmNjKTsKIAotCWxiY2MgPSBkd19taXBpX2RzaV9nZXRf aGNvbXBvbmVudF9sYmNjKGRzaSwgaGJwKTsKKwlsYmNjID0gZHdfbWlwaV9kc2lfZ2V0X2hjb21w b25lbnRfbGJjYyhkc2ksIG1vZGUsIGhicCk7CiAJZHNpX3dyaXRlKGRzaSwgRFNJX1ZJRF9IQlBf VElNRSwgbGJjYyk7CiB9CiAKLXN0YXRpYyB2b2lkIGR3X21pcGlfZHNpX3ZlcnRpY2FsX3RpbWlu Z19jb25maWcoc3RydWN0IGR3X21pcGlfZHNpICpkc2kpCitzdGF0aWMgdm9pZCBkd19taXBpX2Rz aV92ZXJ0aWNhbF90aW1pbmdfY29uZmlnKHN0cnVjdCBkd19taXBpX2RzaSAqZHNpLAorCQkJCQkg ICAgICAgc3RydWN0IGRybV9kaXNwbGF5X21vZGUgKm1vZGUpCiB7CiAJdTMyIHZhY3RpdmUsIHZz YSwgdmZwLCB2YnA7Ci0Jc3RydWN0IGRybV9kaXNwbGF5X21vZGUgKm1vZGUgPSBkc2ktPm1vZGU7 CiAKIAl2YWN0aXZlID0gbW9kZS0+dmRpc3BsYXk7CiAJdnNhID0gbW9kZS0+dnN5bmNfZW5kIC0g bW9kZS0+dnN5bmNfc3RhcnQ7CkBAIC04NTIsMTEgKzg1NCwxMiBAQCBzdGF0aWMgdm9pZCBkd19t aXBpX2RzaV9lbmNvZGVyX2Rpc2FibGUoc3RydWN0IGRybV9lbmNvZGVyICplbmNvZGVyKQogc3Rh dGljIHZvaWQgZHdfbWlwaV9kc2lfZW5jb2Rlcl9lbmFibGUoc3RydWN0IGRybV9lbmNvZGVyICpl bmNvZGVyKQogewogCXN0cnVjdCBkd19taXBpX2RzaSAqZHNpID0gZW5jb2Rlcl90b19kc2koZW5j b2Rlcik7CisJc3RydWN0IGRybV9kaXNwbGF5X21vZGUgKm1vZGUgPSBkc2ktPm1vZGU7CiAJaW50 IG11eCA9IGRybV9vZl9lbmNvZGVyX2FjdGl2ZV9lbmRwb2ludF9pZChkc2ktPmRldi0+b2Zfbm9k ZSwgZW5jb2Rlcik7CiAJdTMyIHZhbDsKIAlpbnQgcmV0OwogCi0JcmV0ID0gZHdfbWlwaV9kc2lf Z2V0X2xhbmVfYnBzKGRzaSk7CisJcmV0ID0gZHdfbWlwaV9kc2lfZ2V0X2xhbmVfYnBzKGRzaSwg bW9kZSk7CiAJaWYgKHJldCA8IDApCiAJCXJldHVybjsKIApAQCAtODY2LDEzICs4NjksMTMgQEAg c3RhdGljIHZvaWQgZHdfbWlwaV9kc2lfZW5jb2Rlcl9lbmFibGUoc3RydWN0IGRybV9lbmNvZGVy ICplbmNvZGVyKQogCX0KIAogCWR3X21pcGlfZHNpX2luaXQoZHNpKTsKLQlkd19taXBpX2RzaV9k cGlfY29uZmlnKGRzaSwgZHNpLT5tb2RlKTsKKwlkd19taXBpX2RzaV9kcGlfY29uZmlnKGRzaSwg bW9kZSk7CiAJZHdfbWlwaV9kc2lfcGFja2V0X2hhbmRsZXJfY29uZmlnKGRzaSk7CiAJZHdfbWlw aV9kc2lfdmlkZW9fbW9kZV9jb25maWcoZHNpKTsKLQlkd19taXBpX2RzaV92aWRlb19wYWNrZXRf Y29uZmlnKGRzaSwgZHNpLT5tb2RlKTsKKwlkd19taXBpX2RzaV92aWRlb19wYWNrZXRfY29uZmln KGRzaSwgbW9kZSk7CiAJZHdfbWlwaV9kc2lfY29tbWFuZF9tb2RlX2NvbmZpZyhkc2kpOwotCWR3 X21pcGlfZHNpX2xpbmVfdGltZXJfY29uZmlnKGRzaSk7Ci0JZHdfbWlwaV9kc2lfdmVydGljYWxf dGltaW5nX2NvbmZpZyhkc2kpOworCWR3X21pcGlfZHNpX2xpbmVfdGltZXJfY29uZmlnKGRzaSwg bW9kZSk7CisJZHdfbWlwaV9kc2lfdmVydGljYWxfdGltaW5nX2NvbmZpZyhkc2ksIG1vZGUpOwog CWR3X21pcGlfZHNpX2RwaHlfdGltaW5nX2NvbmZpZyhkc2kpOwogCWR3X21pcGlfZHNpX2RwaHlf aW50ZXJmYWNlX2NvbmZpZyhkc2kpOwogCWR3X21pcGlfZHNpX2NsZWFyX2Vycihkc2kpOwpAQCAt ODgwLDcgKzg4Myw3IEBAIHN0YXRpYyB2b2lkIGR3X21pcGlfZHNpX2VuY29kZXJfZW5hYmxlKHN0 cnVjdCBkcm1fZW5jb2RlciAqZW5jb2RlcikKIAkJZGV2X2Vycihkc2ktPmRldiwgImZhaWxlZCB0 byBwcmVwYXJlIHBhbmVsXG4iKTsKIAogCWR3X21pcGlfZHNpX3BoeV9pbml0KGRzaSk7Ci0JZHdf bWlwaV9kc2lfd2FpdF9mb3JfdHdvX2ZyYW1lcyhkc2kpOworCWR3X21pcGlfZHNpX3dhaXRfZm9y X3R3b19mcmFtZXMobW9kZSk7CiAKIAlkd19taXBpX2RzaV9zZXRfbW9kZShkc2ksIERXX01JUElf RFNJX1ZJRF9NT0RFKTsKIAlkcm1fcGFuZWxfZW5hYmxlKGRzaS0+cGFuZWwpOwotLSAKMi4xMS4w LjE5Ny5nYjU1NmRlNS5kaXJ0eQoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRl c2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8v ZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: john@metanate.com (John Keeping) Date: Sun, 29 Jan 2017 13:24:22 +0000 Subject: [PATCH v3 02/24] drm/rockchip: dw-mipi-dsi: pass mode in where needed In-Reply-To: <20170129132444.25251-1-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> Message-ID: <20170129132444.25251-3-john@metanate.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This shows that we only use the mode from the enable function and prepares us to remove the "mode" field and the mode_set hook in the next commit. Signed-off-by: John Keeping Reviewed-by: Chris Zhong --- v3: - Add Chris' Reviewed-by New in v2 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 41 ++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index bbd992299f73..cdbd25087e83 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -330,11 +330,11 @@ static int max_mbps_to_testdin(unsigned int max_mbps) * The controller should generate 2 frames before * preparing the peripheral. */ -static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi) +static void dw_mipi_dsi_wait_for_two_frames(struct drm_display_mode *mode) { int refresh, two_frames; - refresh = drm_mode_vrefresh(dsi->mode); + refresh = drm_mode_vrefresh(mode); two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2; msleep(two_frames); } @@ -459,7 +459,8 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi) return ret; } -static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi) +static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi, + struct drm_display_mode *mode) { unsigned int i, pre; unsigned long mpclk, pllref, tmp; @@ -474,7 +475,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi) return bpp; } - mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC); + mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC); if (mpclk) { /* take 1 / 0.9, since mbps must big than bandwidth of RGB */ tmp = mpclk * (bpp / dsi->lanes) * 10 / 9; @@ -742,43 +743,44 @@ static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi) /* Get lane byte clock cycles. */ static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi, + struct drm_display_mode *mode, u32 hcomponent) { u32 frac, lbcc; lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8; - frac = lbcc % dsi->mode->clock; - lbcc = lbcc / dsi->mode->clock; + frac = lbcc % mode->clock; + lbcc = lbcc / mode->clock; if (frac) lbcc++; return lbcc; } -static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi) +static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi, + struct drm_display_mode *mode) { u32 htotal, hsa, hbp, lbcc; - struct drm_display_mode *mode = dsi->mode; htotal = mode->htotal; hsa = mode->hsync_end - mode->hsync_start; hbp = mode->htotal - mode->hsync_end; - lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, htotal); + lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, htotal); dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc); - lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hsa); + lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hsa); dsi_write(dsi, DSI_VID_HSA_TIME, lbcc); - lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hbp); + lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hbp); dsi_write(dsi, DSI_VID_HBP_TIME, lbcc); } -static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi) +static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi, + struct drm_display_mode *mode) { u32 vactive, vsa, vfp, vbp; - struct drm_display_mode *mode = dsi->mode; vactive = mode->vdisplay; vsa = mode->vsync_end - mode->vsync_start; @@ -852,11 +854,12 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) { struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder); + struct drm_display_mode *mode = dsi->mode; int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder); u32 val; int ret; - ret = dw_mipi_dsi_get_lane_bps(dsi); + ret = dw_mipi_dsi_get_lane_bps(dsi, mode); if (ret < 0) return; @@ -866,13 +869,13 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) } dw_mipi_dsi_init(dsi); - dw_mipi_dsi_dpi_config(dsi, dsi->mode); + dw_mipi_dsi_dpi_config(dsi, mode); dw_mipi_dsi_packet_handler_config(dsi); dw_mipi_dsi_video_mode_config(dsi); - dw_mipi_dsi_video_packet_config(dsi, dsi->mode); + dw_mipi_dsi_video_packet_config(dsi, mode); dw_mipi_dsi_command_mode_config(dsi); - dw_mipi_dsi_line_timer_config(dsi); - dw_mipi_dsi_vertical_timing_config(dsi); + dw_mipi_dsi_line_timer_config(dsi, mode); + dw_mipi_dsi_vertical_timing_config(dsi, mode); dw_mipi_dsi_dphy_timing_config(dsi); dw_mipi_dsi_dphy_interface_config(dsi); dw_mipi_dsi_clear_err(dsi); @@ -880,7 +883,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) dev_err(dsi->dev, "failed to prepare panel\n"); dw_mipi_dsi_phy_init(dsi); - dw_mipi_dsi_wait_for_two_frames(dsi); + dw_mipi_dsi_wait_for_two_frames(mode); dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE); drm_panel_enable(dsi->panel); -- 2.11.0.197.gb556de5.dirty From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751542AbdA2OJN (ORCPT ); Sun, 29 Jan 2017 09:09:13 -0500 Received: from dougal.metanate.com ([90.155.101.14]:23115 "EHLO metanate.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751486AbdA2OJI (ORCPT ); Sun, 29 Jan 2017 09:09:08 -0500 From: John Keeping To: Mark Yao Cc: Chris Zhong , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, John Keeping Subject: [PATCH v3 02/24] drm/rockchip: dw-mipi-dsi: pass mode in where needed Date: Sun, 29 Jan 2017 13:24:22 +0000 Message-Id: <20170129132444.25251-3-john@metanate.com> X-Mailer: git-send-email 2.11.0.197.gb556de5.dirty In-Reply-To: <20170129132444.25251-1-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This shows that we only use the mode from the enable function and prepares us to remove the "mode" field and the mode_set hook in the next commit. Signed-off-by: John Keeping Reviewed-by: Chris Zhong --- v3: - Add Chris' Reviewed-by New in v2 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 41 ++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index bbd992299f73..cdbd25087e83 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -330,11 +330,11 @@ static int max_mbps_to_testdin(unsigned int max_mbps) * The controller should generate 2 frames before * preparing the peripheral. */ -static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi) +static void dw_mipi_dsi_wait_for_two_frames(struct drm_display_mode *mode) { int refresh, two_frames; - refresh = drm_mode_vrefresh(dsi->mode); + refresh = drm_mode_vrefresh(mode); two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2; msleep(two_frames); } @@ -459,7 +459,8 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi) return ret; } -static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi) +static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi, + struct drm_display_mode *mode) { unsigned int i, pre; unsigned long mpclk, pllref, tmp; @@ -474,7 +475,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi) return bpp; } - mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC); + mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC); if (mpclk) { /* take 1 / 0.9, since mbps must big than bandwidth of RGB */ tmp = mpclk * (bpp / dsi->lanes) * 10 / 9; @@ -742,43 +743,44 @@ static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi) /* Get lane byte clock cycles. */ static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi, + struct drm_display_mode *mode, u32 hcomponent) { u32 frac, lbcc; lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8; - frac = lbcc % dsi->mode->clock; - lbcc = lbcc / dsi->mode->clock; + frac = lbcc % mode->clock; + lbcc = lbcc / mode->clock; if (frac) lbcc++; return lbcc; } -static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi) +static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi, + struct drm_display_mode *mode) { u32 htotal, hsa, hbp, lbcc; - struct drm_display_mode *mode = dsi->mode; htotal = mode->htotal; hsa = mode->hsync_end - mode->hsync_start; hbp = mode->htotal - mode->hsync_end; - lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, htotal); + lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, htotal); dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc); - lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hsa); + lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hsa); dsi_write(dsi, DSI_VID_HSA_TIME, lbcc); - lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hbp); + lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hbp); dsi_write(dsi, DSI_VID_HBP_TIME, lbcc); } -static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi) +static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi, + struct drm_display_mode *mode) { u32 vactive, vsa, vfp, vbp; - struct drm_display_mode *mode = dsi->mode; vactive = mode->vdisplay; vsa = mode->vsync_end - mode->vsync_start; @@ -852,11 +854,12 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) { struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder); + struct drm_display_mode *mode = dsi->mode; int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder); u32 val; int ret; - ret = dw_mipi_dsi_get_lane_bps(dsi); + ret = dw_mipi_dsi_get_lane_bps(dsi, mode); if (ret < 0) return; @@ -866,13 +869,13 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) } dw_mipi_dsi_init(dsi); - dw_mipi_dsi_dpi_config(dsi, dsi->mode); + dw_mipi_dsi_dpi_config(dsi, mode); dw_mipi_dsi_packet_handler_config(dsi); dw_mipi_dsi_video_mode_config(dsi); - dw_mipi_dsi_video_packet_config(dsi, dsi->mode); + dw_mipi_dsi_video_packet_config(dsi, mode); dw_mipi_dsi_command_mode_config(dsi); - dw_mipi_dsi_line_timer_config(dsi); - dw_mipi_dsi_vertical_timing_config(dsi); + dw_mipi_dsi_line_timer_config(dsi, mode); + dw_mipi_dsi_vertical_timing_config(dsi, mode); dw_mipi_dsi_dphy_timing_config(dsi); dw_mipi_dsi_dphy_interface_config(dsi); dw_mipi_dsi_clear_err(dsi); @@ -880,7 +883,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) dev_err(dsi->dev, "failed to prepare panel\n"); dw_mipi_dsi_phy_init(dsi); - dw_mipi_dsi_wait_for_two_frames(dsi); + dw_mipi_dsi_wait_for_two_frames(mode); dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE); drm_panel_enable(dsi->panel); -- 2.11.0.197.gb556de5.dirty