From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxim Sloyko Date: Mon, 30 Jan 2017 11:35:03 -0800 Subject: [U-Boot] [PATCH 0/1] Fix H-PLL and M-PLL clock rate calculation in ast2500 clock driver Message-ID: <20170130193504.11325-1-maxims@google.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This is a fix to a very dumb (division by zero) mistake I made in the series where I added support for ast2500 eval board. It is not causing any problems for that board yet, because no driver requests the rate of any clock yet, but I think it's still better to fix it for this release. Maxim Sloyko (1): aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation drivers/clk/aspeed/clk_ast2500.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.11.0.483.g087da7b7c-goog