From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sean Paul Subject: Re: [PATCH v3 14/24] drm/rockchip: dw-mipi-dsi: ensure PHY is reset Date: Mon, 30 Jan 2017 15:25:47 -0500 Message-ID: <20170130202547.GQ20076@art_vandelay> References: <20170129132444.25251-1-john@metanate.com> <20170129132444.25251-15-john@metanate.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20170129132444.25251-15-john@metanate.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: John Keeping Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org T24gU3VuLCBKYW4gMjksIDIwMTcgYXQgMDE6MjQ6MzRQTSArMDAwMCwgSm9obiBLZWVwaW5nIHdy b3RlOgo+IEFsc28gZG9uJ3QgcG93ZXIgdXAgdGhlIERTSSBob3N0IGF0IHRoaXMgcG9pbnQgc2lu Y2UgdGhpcyBpcyBub3QKPiBuZWNlc3NhcnkgaW4gb3JkZXIgdG8gY29uZmlndXJlIHRoZSBQSFkg YW5kIHdlIGRvIHNvIGxhdGVyIHdoZW4KPiBzZWxlY3RpbmcgdmlkZW8gb3IgY29tbWFuZCBtb2Rl Lgo+IAoKUmV2aWV3ZWQtYnk6IFNlYW4gUGF1bCA8c2VhbnBhdWxAY2hyb21pdW0ub3JnPgoKPiBT aWduZWQtb2ZmLWJ5OiBKb2huIEtlZXBpbmcgPGpvaG5AbWV0YW5hdGUuY29tPgo+IFJldmlld2Vk LWJ5OiBDaHJpcyBaaG9uZyA8enl3QHJvY2stY2hpcHMuY29tPgo+IC0tLQo+IHYzOgo+IC0gQWRk IENocmlzJyBSZXZpZXdlZC1ieQo+IFVuY2hhbmdlZCBpbiB2Mgo+IAo+ICBkcml2ZXJzL2dwdS9k cm0vcm9ja2NoaXAvZHctbWlwaS1kc2kuYyB8IDUgKysrKy0KPiAgMSBmaWxlIGNoYW5nZWQsIDQg aW5zZXJ0aW9ucygrKSwgMSBkZWxldGlvbigtKQo+IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dw dS9kcm0vcm9ja2NoaXAvZHctbWlwaS1kc2kuYyBiL2RyaXZlcnMvZ3B1L2RybS9yb2NrY2hpcC9k dy1taXBpLWRzaS5jCj4gaW5kZXggYzJlMGJhOTZlMGEwLi41YjMwNjhlOWU4ZGIgMTAwNjQ0Cj4g LS0tIGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL2R3LW1pcGktZHNpLmMKPiArKysgYi9kcml2 ZXJzL2dwdS9kcm0vcm9ja2NoaXAvZHctbWlwaS1kc2kuYwo+IEBAIC0zOTcsNyArMzk3LDEwIEBA IHN0YXRpYyBpbnQgZHdfbWlwaV9kc2lfcGh5X2luaXQoc3RydWN0IGR3X21pcGlfZHNpICpkc2kp Cj4gIAkJcmV0dXJuIHRlc3RkaW47Cj4gIAl9Cj4gIAo+IC0JZHNpX3dyaXRlKGRzaSwgRFNJX1BX Ul9VUCwgUE9XRVJVUCk7Cj4gKwkvKiBTdGFydCBieSBjbGVhcmluZyBQSFkgc3RhdGUgKi8KPiAr CWRzaV93cml0ZShkc2ksIERTSV9QSFlfVFNUX0NUUkwwLCBQSFlfVU5URVNUQ0xSKTsKPiArCWRz aV93cml0ZShkc2ksIERTSV9QSFlfVFNUX0NUUkwwLCBQSFlfVEVTVENMUik7Cj4gKwlkc2lfd3Jp dGUoZHNpLCBEU0lfUEhZX1RTVF9DVFJMMCwgUEhZX1VOVEVTVENMUik7Cj4gIAo+ICAJZHdfbWlw aV9kc2lfcGh5X3dyaXRlKGRzaSwgMHgxMCwgQllQQVNTX1ZDT19SQU5HRSB8Cj4gIAkJCQkJIFZD T19SQU5HRV9DT05fU0VMKHZjbykgfAo+IC0tIAo+IDIuMTEuMC4xOTcuZ2I1NTZkZTUuZGlydHkK PiAKPiBfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwo+IGRy aS1kZXZlbCBtYWlsaW5nIGxpc3QKPiBkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCj4g aHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK Ci0tIApTZWFuIFBhdWwsIFNvZnR3YXJlIEVuZ2luZWVyLCBHb29nbGUgLyBDaHJvbWl1bSBPUwpf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwg bWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: seanpaul@chromium.org (Sean Paul) Date: Mon, 30 Jan 2017 15:25:47 -0500 Subject: [PATCH v3 14/24] drm/rockchip: dw-mipi-dsi: ensure PHY is reset In-Reply-To: <20170129132444.25251-15-john@metanate.com> References: <20170129132444.25251-1-john@metanate.com> <20170129132444.25251-15-john@metanate.com> Message-ID: <20170130202547.GQ20076@art_vandelay> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Sun, Jan 29, 2017 at 01:24:34PM +0000, John Keeping wrote: > Also don't power up the DSI host at this point since this is not > necessary in order to configure the PHY and we do so later when > selecting video or command mode. > Reviewed-by: Sean Paul > Signed-off-by: John Keeping > Reviewed-by: Chris Zhong > --- > v3: > - Add Chris' Reviewed-by > Unchanged in v2 > > drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > index c2e0ba96e0a0..5b3068e9e8db 100644 > --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > @@ -397,7 +397,10 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi) > return testdin; > } > > - dsi_write(dsi, DSI_PWR_UP, POWERUP); > + /* Start by clearing PHY state */ > + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); > + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR); > + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); > > dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE | > VCO_RANGE_CON_SEL(vco) | > -- > 2.11.0.197.gb556de5.dirty > > _______________________________________________ > dri-devel mailing list > dri-devel at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Sean Paul, Software Engineer, Google / Chromium OS From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754488AbdA3U0J (ORCPT ); Mon, 30 Jan 2017 15:26:09 -0500 Received: from mail-qk0-f169.google.com ([209.85.220.169]:34988 "EHLO mail-qk0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754462AbdA3U0F (ORCPT ); Mon, 30 Jan 2017 15:26:05 -0500 Date: Mon, 30 Jan 2017 15:25:47 -0500 From: Sean Paul To: John Keeping Cc: Mark Yao , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 14/24] drm/rockchip: dw-mipi-dsi: ensure PHY is reset Message-ID: <20170130202547.GQ20076@art_vandelay> References: <20170129132444.25251-1-john@metanate.com> <20170129132444.25251-15-john@metanate.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170129132444.25251-15-john@metanate.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Jan 29, 2017 at 01:24:34PM +0000, John Keeping wrote: > Also don't power up the DSI host at this point since this is not > necessary in order to configure the PHY and we do so later when > selecting video or command mode. > Reviewed-by: Sean Paul > Signed-off-by: John Keeping > Reviewed-by: Chris Zhong > --- > v3: > - Add Chris' Reviewed-by > Unchanged in v2 > > drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > index c2e0ba96e0a0..5b3068e9e8db 100644 > --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > @@ -397,7 +397,10 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi) > return testdin; > } > > - dsi_write(dsi, DSI_PWR_UP, POWERUP); > + /* Start by clearing PHY state */ > + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); > + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR); > + dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); > > dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE | > VCO_RANGE_CON_SEL(vco) | > -- > 2.11.0.197.gb556de5.dirty > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Sean Paul, Software Engineer, Google / Chromium OS