From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: Re: drm: panel-simple: Problems to use Seiko 43WVF1G panel and DRM_MXS driver on the i.MX6SX SabreSD. Date: Wed, 1 Feb 2017 17:52:15 +0100 Message-ID: <20170201165215.GD18725@ulmo.ba.sec> References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1550648029==" Return-path: Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id DE9556E334 for ; Wed, 1 Feb 2017 16:52:18 +0000 (UTC) Received: by mail-wm0-x241.google.com with SMTP id r18so6858583wmd.3 for ; Wed, 01 Feb 2017 08:52:18 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Breno Matheus Lima Cc: Marek Vasut , Fabio Estevam , dri-devel@lists.freedesktop.org, Breno Matheus Lima List-Id: dri-devel@lists.freedesktop.org --===============1550648029== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="C1iGAkRnbeBonpVg" Content-Disposition: inline --C1iGAkRnbeBonpVg Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Feb 01, 2017 at 02:04:29PM -0200, Breno Matheus Lima wrote: > Hi, >=20 > I'm trying to use the Seiko 43WVF1G panel (Datasheet link: > http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf) and the DRM_MXS > driver on > the i.MX6SX SabreSD. Applying the patch below removes the old > timing configuration on the dtsi and adds it to the panel-simple.c > I can get the display working, but the image is out of place. Another poi= nt > to > note is that it's necessary to set the reg_lcd_3v3 to regulator-always-on > otherwise the gpio3 27 does not get enabled. >=20 > The main two problems that I'm having at the moment are: >=20 > - Gpio3 27 is not being set by the driver, function > panel_simple_prepare(struct drm_panel *panel) is not being called. =46rom a quick look the mxsfb driver is not fully implementing panel handling. It should really call drm_panel_prepare() and drm_panel_enable() while switching on the display pipeline and drm_panel_disable(), followed by drm_panel_unprepare() while switching off the display pipeline. That should take care of setting that GPIO. > - The image is displaced even when using the same timing values in > the datasheet. >=20 > I would like to know if I'm doing something wrong on my dtsi, or if > something > is missing on the panel-simple.c. I would appreciate any help. I was going to say that you could try and add debug output to the driver to see if the same values end up being programmed into the CRTC, but the driver currently doesn't seem to work with the existing bindings either, it relies entirely on DRM panel to get the modes, but evidently there is a lack of proper support for that. I wonder how this has been tested in the first place. Maybe Marek can help answer these questions. Thierry > diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi > b/arch/arm/boot/dts/imx6sx-sdb.dtsi > index da81552..13fcce9 100644 > --- a/arch/arm/boot/dts/imx6sx-sdb.dtsi > +++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi > @@ -24,7 +24,7 @@ > reg =3D <0x80000000 0x40000000>; > }; >=20 > - backlight { > + backlight_display: backlight-display { > compatible =3D "pwm-backlight"; > pwms =3D <&pwm3 0 5000000>; > brightness-levels =3D <0 4 8 16 32 64 128 255>; > @@ -104,6 +104,7 @@ > regulator-name =3D "lcd-3v3"; > gpio =3D <&gpio3 27 0>; > enable-active-high; > + regulator-always-on; > }; >=20 > reg_peri_3v3: regulator@5 { > @@ -146,6 +147,19 @@ > mux-int-port =3D <2>; > mux-ext-port =3D <6>; > }; > + > + panel { > + compatible =3D "seiko,43wvf1g", "simple-panel"; > + backlight =3D <&backlight_display>; > + > + power-supply =3D <®_lcd_3v3>; > + > + port { > + panel_in: endpoint { > + remote-endpoint =3D <&display_out>; > + }; > + }; > + }; > }; >=20 > &audmux { > @@ -215,33 +229,14 @@ > &lcdif1 { > pinctrl-names =3D "default"; > pinctrl-0 =3D <&pinctrl_lcd>; > - lcd-supply =3D <®_lcd_3v3>; > - display =3D <&display0>; > status =3D "okay"; >=20 > - display0: display0 { > - bits-per-pixel =3D <16>; > - bus-width =3D <24>; > - > - display-timings { > - native-mode =3D <&timing0>; > - timing0: timing0 { > - clock-frequency =3D <33500000>; > - hactive =3D <800>; > - vactive =3D <480>; > - hback-porch =3D <89>; > - hfront-porch =3D <164>; > - vback-porch =3D <23>; > - vfront-porch =3D <10>; > - hsync-len =3D <10>; > - vsync-len =3D <10>; > - hsync-active =3D <0>; > - vsync-active =3D <0>; > - de-active =3D <1>; > - pixelclk-active =3D <0>; > - }; > + port{ > + display_out: endpoint { > + remote-endpoint =3D <&panel_in>; > }; > }; > + > }; >=20 > &pwm3 { > diff --git a/drivers/gpu/drm/panel/panel-simple.c > b/drivers/gpu/drm/panel/panel-simple.c > index 06aaf79..8faefee 100644 > --- a/drivers/gpu/drm/panel/panel-simple.c > +++ b/drivers/gpu/drm/panel/panel-simple.c > @@ -863,6 +863,31 @@ static const struct panel_desc hannstar_hsd070pww1 = =3D { > .bus_format =3D MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, > }; >=20 > +static const struct display_timing seiko_43wvf1g_timing =3D { > + .pixelclock =3D { 33500000, 33500000, 33500000 }, > + .hactive =3D { 800, 800, 800 }, > + .hfront_porch =3D { 164, 164, 164 }, > + .hback_porch =3D { 89, 89, 89 }, > + .hsync_len =3D { 10, 10, 10 }, > + .vactive =3D { 480, 480, 480 }, > + .vfront_porch =3D { 10, 10, 10 }, > + .vback_porch =3D { 23, 23, 23 }, > + .vsync_len =3D { 10, 10, 10 }, > + .flags =3D DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE | > + DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW, > +}; > + > +static const struct panel_desc seiko_43wvf1g =3D { > + .timings =3D &seiko_43wvf1g_timing, > + .num_timings =3D 1, > + .bpc =3D 8, > + .size =3D { > + .width =3D 93, > + .height =3D 57, > + }, > + .bus_format =3D MEDIA_BUS_FMT_RGB888_1X24, > +}; > + > static const struct display_timing hannstar_hsd100pxn1_timing =3D { > .pixelclock =3D { 55000000, 65000000, 75000000 }, > .hactive =3D { 1024, 1024, 1024 }, > @@ -1853,6 +1878,9 @@ static const struct of_device_id platform_of_match[] > =3D { > .compatible =3D "samsung,ltn140at29-301", > .data =3D &samsung_ltn140at29_301, > }, { > + .compatible =3D "seiko,43wvf1g", > + .data =3D &seiko_43wvf1g, > + }, { > .compatible =3D "sharp,lq101k1ly04", > .data =3D &sharp_lq101k1ly04, > }, { > -- > 2.7.4 >=20 >=20 > -- > Breno Matheus Lima --C1iGAkRnbeBonpVg Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAliSEjwACgkQ3SOs138+ s6Ey2w/8C4+e/GPE1Z5OxaeHOwCWwSnuGVf/rrznhW5M4C+4YfSmuwdWcPyNNx5x 0SRxPWj4ttJHG0jLw6tqG2l7VwEKIpF8J8iLj2fJ/XyOtEqvtoD+06AuOHlTRsGl iGH/PfvSfw93Np8cFh3hyfxKgv5u/8/erClh7J/rKJNiCbBWJrkx8p9p3PB06BW6 dZ/0bueKPwg69FyK3c/o8IvLUZ7W4Kf54fim2cxB78Z0ZGcWywJLfdK2vwSshNYV 2xvYp/Fh9lybw0YYD0PIwFAGTuXjIlAxpsbC9flGfe4+ovWuMLhxLYRu69o/uSWi nWjIRbidk3LnJt/PnEXw//ujXgsbEBJdTrx5Gzd4wrFujcsM8AXRwgLB3c1vvHz0 1ZK40YZFW+u2v+cUZBpvOmccDuJGiokUmdEWTxxEQ4q2GNZqliezKicHUV3Xl81V UKqzbOL3PJetHGc+dCnVhB30LNMR7pb9J8dUZb7M3Mb2PvOG17LBhd2TRO8uUzg7 dtN0EsVwqTysqPOSjI8C77A19Y7IIK3J+czvBVqhAr0y3GcFR//q4rKDmRtzqm8e SZ/3q2+0PLKmJ9KmCVoQdqqMSUMG2YtbWaNHSRLbCfcyRliyO87+FeJTSXxfH7q1 WsdC2JUHa9IK39BYfKXaceo+NSaazKeL2LJBwMf0zv5JflxQmTc= =5XuH -----END PGP SIGNATURE----- --C1iGAkRnbeBonpVg-- --===============1550648029== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== --===============1550648029==--