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Tsirkin" To: Laszlo Ersek Message-ID: <20170209201301-mutt-send-email-mst@kernel.org> References: <1486644810-33181-1-git-send-email-agraf@suse.de> <70829774-a0c4-79ae-2eaf-cfac19e9dd7d@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <70829774-a0c4-79ae-2eaf-cfac19e9dd7d@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Thu, 09 Feb 2017 18:13:23 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: Re: [Qemu-arm] [PATCH v2 0/4] target-arm: Add some omitted dma cache coherency flags X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , Shannon Zhao , qemu-arm@nongnu.org, Alexander Graf , qemu-devel@nongnu.org Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: YMeobHT/U0lz On Thu, Feb 09, 2017 at 02:15:36PM +0100, Laszlo Ersek wrote: > On 02/09/17 13:53, Alexander Graf wrote: > > ARM is amazing when it comes to cache coherency and VMs. While any sane > > architecture allows the host to override the guest's caching attributes, > > that's very hard to do on ARM. > > > > That means that the guest may directly access guest memory bypassing the > > cache while QEMU happily writes to / reads from cache. The end result is > > very nasty, because both sides see very different views of the world. > > > > That means that we need to be very cautious to tell guests that devices > > that QEMU emulates are going to use data in the cache rather than directly > > on memory. > > > > We added this to PCI a while back for DT (5d636e21 "hw/arm/virt: mark the PCIe > > host controller as DMA coherent in the DT") and ACPI (bc64b96 "hw/arm/virt- > > acpi-build: _CCA attribute is compulsory") but never updated virtio-mmio or > > fw-cfg in DT or ACPI tables. > > > > This patch set adds the respective cache coherency flags for them in both DT and > > ACPI. > > > > Fortunately, no guests except for Linux 4.9.7 and 4.9.8 are broken because of > > this. Upstream realized quickly enough that every user of virtio-mmio out there > > describes its cache coherency incorrectly and reverted the patch that would > > require said dma coherency flag. But we should be safe for the future and "do > > the right thing". > > > > Alexander Graf (4): > > target-arm: Declare virtio-mmio as dma-coherent in dt > > hw/arm/virt: Declare virtio-mmio as dma cache coherent in ACPI > > hw/arm/virt: Declare fwcfg as dma cache coherent in ACPI > > hw/arm/virt: Declare fwcfg as dma cache coherent in dt > > > > hw/arm/vexpress.c | 1 + > > hw/arm/virt-acpi-build.c | 2 ++ > > hw/arm/virt.c | 2 ++ > > 3 files changed, 5 insertions(+) > > > > Famous last words: > series > Reviewed-by: Laszlo Ersek > > Should we replicate patch #3 to QEMU0002 / FWCF in > "hw/i386/acpi-build.c" too? Or is it that we couldn't care less about > _CCA on x86? :) (Can't really muster the energy right now to look it up > in the ACPI spec, sorry!) > > Thanks > Laszlo ACPI spec says: On platforms for which existing default cache-coherency behavior of the OS is not adequate, _CCA enables the OS to adapt to the differences So I think we don't need it on x86. -- MST