diff for duplicates of <20170220175054.GP21222@n2100.armlinux.org.uk> diff --git a/a/1.txt b/N1/1.txt index 33f49e7..54ea287 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,34 +1,29 @@ On Mon, Feb 20, 2017 at 06:36:33PM +0100, Alexandre Belloni wrote: > On 20/02/2017 at 18:06:11 +0100, Gregory CLEMENT wrote: -> > On ven., f=C3=A9vr. 17 2017, Gregory CLEMENT <gregory.clement@free-ele= -ctrons.com> wrote: -> >=20 -> > > The Armada 7K/8K SoCs use the same RTC IP than the Armada 38x. Howeve= -r +> > On ven., f?vr. 17 2017, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote: +> > +> > > The Armada 7K/8K SoCs use the same RTC IP than the Armada 38x. However > > > the SOC integration differs in 2 points: > > > - MBUS bridge timing initialization > > > - IRQ configuration at SoC level > > > > > > This patch set extends the driver support to these SoCs family. > > > -> > > In this second version the device tree was updated allowing to use th= -e +> > > In this second version the device tree was updated allowing to use the > > > RTC on Armada 80x0 SoCs. Indeed on the Armada 80x0, the RTC clock in -> > > CP master is not connected (by package) to the oscillator. So this on= -e +> > > CP master is not connected (by package) to the oscillator. So this one > > > is disabled for the Armada 8020 and the Armada 8040. On these SoCs it > > > will be the RTC clock in CP slave connected to the oscillator which > > > will be used. -> >=20 -> > I saw on IRC than Russell managed to have a more coherent date with thi= -s +> > +> > I saw on IRC than Russell managed to have a more coherent date with this > > series on his 8040 based board. For the record, as the U-Boot on this > > board didn't provide a "date reset" command for the RTC located on CP > > slave, then Russell needed to do the following: -> >=20 +> > > > devmem2 0xf428401c w 0 > > devmem2 0xf4284018 w 0x2000 ->=20 +> > The question being what does that do and whether it could be done in the > driver instead. @@ -50,15 +45,14 @@ Table 1461: RTC Clock Correction Register Offset: 0x000A3818 Bit Field Type / InitVal Description 31:16 Reserved RSVD 0x0 Reserved 15 Correct Mode RW 0x0 Correction Mode - 0 =3D Low - 1 =3D High + 0 = Low + 1 = High 14:0 Correct Value RW 0x0 Correction Value Table 1462: RTC Test Configuration Register Offset: 0x000A381C Bit Field Type / InitVal Description 31:5 Reserved RSVD 0x0 Reserved -4 Func Test RW 0x0 Functional Test Accelerat= -ion +4 Func Test RW 0x0 Functional Test Acceleration 3:0 Reserved RSVD 0x0 Reserved So, we don't know what the first write really does. @@ -73,19 +67,7 @@ kernel boots, since that's a tuning parameter. This is all purely guesswork though. ---=20 +-- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up according to speedtest.net. - ---=20 -You received this message because you are subscribed to "rtc-linux". -Membership options at http://groups.google.com/group/rtc-linux . -Please read http://groups.google.com/group/rtc-linux/web/checklist -before submitting a driver. ----=20 -You received this message because you are subscribed to the Google Groups "= -rtc-linux" group. -To unsubscribe from this group and stop receiving emails from it, send an e= -mail to rtc-linux+unsubscribe@googlegroups.com. -For more options, visit https://groups.google.com/d/optout. diff --git a/a/content_digest b/N1/content_digest index 2fdbc40..c1c52af 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,52 +1,38 @@ "ref\020170217101907.8963-1-gregory.clement@free-electrons.com\0" "ref\087tw7oaj24.fsf@free-electrons.com\0" "ref\020170220173633.d4ke4eohaacgsw3h@piout.net\0" - "From\0Russell King - ARM Linux <linux@armlinux.org.uk>\0" - "Subject\0[rtc-linux] Re: [PATCH v2 0/3] Extend rtc-armada38x support for Armada 7K/8K\0" + "From\0linux@armlinux.org.uk (Russell King - ARM Linux)\0" + "Subject\0[PATCH v2 0/3] Extend rtc-armada38x support for Armada 7K/8K\0" "Date\0Mon, 20 Feb 2017 17:50:54 +0000\0" - "To\0Alexandre Belloni <alexandre.belloni@free-electrons.com>\0" - "Cc\0Gregory CLEMENT <gregory.clement@free-electrons.com>" - Thomas Petazzoni <thomas.petazzoni@free-electrons.com> - Alessandro Zummo <a.zummo@towertech.it> - Jason Cooper <jason@lakedaemon.net> - rtc-linux@googlegroups.com - Andrew Lunn <andrew@lunn.ch> - Haim Boot <hayim@marvell.com> - linux-arm-kernel@lists.infradead.org - " Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Mon, Feb 20, 2017 at 06:36:33PM +0100, Alexandre Belloni wrote:\n" "> On 20/02/2017 at 18:06:11 +0100, Gregory CLEMENT wrote:\n" - "> > On ven., f=C3=A9vr. 17 2017, Gregory CLEMENT <gregory.clement@free-ele=\n" - "ctrons.com> wrote:\n" - "> >=20\n" - "> > > The Armada 7K/8K SoCs use the same RTC IP than the Armada 38x. Howeve=\n" - "r\n" + "> > On ven., f?vr. 17 2017, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote:\n" + "> > \n" + "> > > The Armada 7K/8K SoCs use the same RTC IP than the Armada 38x. However\n" "> > > the SOC integration differs in 2 points:\n" "> > > - MBUS bridge timing initialization\n" "> > > - IRQ configuration at SoC level\n" "> > >\n" "> > > This patch set extends the driver support to these SoCs family.\n" "> > >\n" - "> > > In this second version the device tree was updated allowing to use th=\n" - "e\n" + "> > > In this second version the device tree was updated allowing to use the\n" "> > > RTC on Armada 80x0 SoCs. Indeed on the Armada 80x0, the RTC clock in\n" - "> > > CP master is not connected (by package) to the oscillator. So this on=\n" - "e\n" + "> > > CP master is not connected (by package) to the oscillator. So this one\n" "> > > is disabled for the Armada 8020 and the Armada 8040. On these SoCs it\n" "> > > will be the RTC clock in CP slave connected to the oscillator which\n" "> > > will be used.\n" - "> >=20\n" - "> > I saw on IRC than Russell managed to have a more coherent date with thi=\n" - "s\n" + "> > \n" + "> > I saw on IRC than Russell managed to have a more coherent date with this\n" "> > series on his 8040 based board. For the record, as the U-Boot on this\n" "> > board didn't provide a \"date reset\" command for the RTC located on CP\n" "> > slave, then Russell needed to do the following:\n" - "> >=20\n" + "> > \n" "> > devmem2 0xf428401c w 0\n" "> > devmem2 0xf4284018 w 0x2000\n" - ">=20\n" + "> \n" "> The question being what does that do and whether it could be done in the\n" "> driver instead.\n" "\n" @@ -68,15 +54,14 @@ "Bit Field Type / InitVal Description\n" "31:16 Reserved RSVD 0x0 Reserved\n" "15 Correct Mode RW 0x0 Correction Mode\n" - " 0 =3D Low\n" - " 1 =3D High\n" + " 0 = Low\n" + " 1 = High\n" "14:0 Correct Value RW 0x0 Correction Value\n" "\n" "Table 1462: RTC Test Configuration Register Offset: 0x000A381C\n" "Bit Field Type / InitVal Description\n" "31:5 Reserved RSVD 0x0 Reserved\n" - "4 Func Test RW 0x0 Functional Test Accelerat=\n" - "ion\n" + "4 Func Test RW 0x0 Functional Test Acceleration\n" "3:0 Reserved RSVD 0x0 Reserved\n" "\n" "So, we don't know what the first write really does.\n" @@ -91,21 +76,9 @@ "\n" "This is all purely guesswork though.\n" "\n" - "--=20\n" + "-- \n" "RMK's Patch system: http://www.armlinux.org.uk/developer/patches/\n" "FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up\n" - "according to speedtest.net.\n" - "\n" - "--=20\n" - "You received this message because you are subscribed to \"rtc-linux\".\n" - "Membership options at http://groups.google.com/group/rtc-linux .\n" - "Please read http://groups.google.com/group/rtc-linux/web/checklist\n" - "before submitting a driver.\n" - "---=20\n" - "You received this message because you are subscribed to the Google Groups \"=\n" - "rtc-linux\" group.\n" - "To unsubscribe from this group and stop receiving emails from it, send an e=\n" - "mail to rtc-linux+unsubscribe@googlegroups.com.\n" - For more options, visit https://groups.google.com/d/optout. + according to speedtest.net. -5f60b17ab44fc2af148adeb7fa0b5c9681f97155a6d0a155d9aff394f3c13a14 +1fde3d4b48af42b7f10d402bc9eb56f15152bb2ba9487a9c074f1533c89fed6e
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