diff for duplicates of <20170222034632.GA18116@spreadtrum.com>

diff --git a/a/1.txt b/N1/1.txt
index 7e5a5db..2d3bcb7 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,8 +1,8 @@
 Hello Mathieu,
 
-On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
+On 二,  2月 21, 2017 at 09:27:44上午 -0700, Mathieu Poirier wrote:
 > On Tue, Feb 21, 2017 at 02:55:02PM +0800, Chunyan Zhang wrote:
-> > From: Orson Zhai <orson.zhai@spreadtrum.com>
+> > From: Orson Zhai <orson.zhai-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>
 > 
 > Hello Chunyan,
 > 
@@ -13,8 +13,8 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > peripherals IP nodes, sc9860.dtsi contains stuff related to ARM core stuff
 > > and sp9860g dts is for the board level.
 > > 
-> > Signed-off-by: Orson Zhai <orson.zhai@spreadtrum.com>
-> > Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
+> > Signed-off-by: Orson Zhai <orson.zhai-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>
+> > Signed-off-by: Chunyan Zhang <chunyan.zhang-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>
 > > ---
 > >  arch/arm64/boot/dts/sprd/Makefile         |   3 +-
 > >  arch/arm64/boot/dts/sprd/sc9860.dtsi      | 531 ++++++++++++++++++++++++++++++
@@ -90,7 +90,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +			};
 > > +		};
 > > +
-> > +		CPU0: cpu at 530000 {
+> > +		CPU0: cpu@530000 {
 > > +			device_type = "cpu";
 > > +			compatible = "arm,cortex-a53", "arm,armv8";
 > > +			reg = <0x0 0x530000>;
@@ -98,7 +98,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +			cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +		};
 > > +
-> > +		CPU1: cpu at 530001 {
+> > +		CPU1: cpu@530001 {
 > > +			device_type = "cpu";
 > > +			compatible = "arm,cortex-a53", "arm,armv8";
 > > +			reg = <0x0 0x530001>;
@@ -106,7 +106,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +			cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +		};
 > > +
-> > +		CPU2: cpu at 530002 {
+> > +		CPU2: cpu@530002 {
 > > +			device_type = "cpu";
 > > +			compatible = "arm,cortex-a53", "arm,armv8";
 > > +			reg = <0x0 0x530002>;
@@ -114,7 +114,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +			cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +		};
 > > +
-> > +		CPU3: cpu at 530003 {
+> > +		CPU3: cpu@530003 {
 > > +			device_type = "cpu";
 > > +			compatible = "arm,cortex-a53", "arm,armv8";
 > > +			reg = <0x0 0x530003>;
@@ -122,7 +122,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +			cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +		};
 > > +
-> > +		CPU4: cpu at 530100 {
+> > +		CPU4: cpu@530100 {
 > > +			device_type = "cpu";
 > > +			compatible = "arm,cortex-a53", "arm,armv8";
 > > +			reg = <0x0 0x530100>;
@@ -130,7 +130,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +			cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +		};
 > > +
-> > +		CPU5: cpu at 530101 {
+> > +		CPU5: cpu@530101 {
 > > +			device_type = "cpu";
 > > +			compatible = "arm,cortex-a53", "arm,armv8";
 > > +			reg = <0x0 0x530101>;
@@ -138,7 +138,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +			cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +		};
 > > +
-> > +		CPU6: cpu at 530102 {
+> > +		CPU6: cpu@530102 {
 > > +			device_type = "cpu";
 > > +			compatible = "arm,cortex-a53", "arm,armv8";
 > > +			reg = <0x0 0x530102>;
@@ -146,7 +146,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +			cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +		};
 > > +
-> > +		CPU7: cpu at 530103 {
+> > +		CPU7: cpu@530103 {
 > > +			device_type = "cpu";
 > > +			compatible = "arm,cortex-a53", "arm,armv8";
 > > +			reg = <0x0 0x530103>;
@@ -177,7 +177,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +		};
 > > +	};
 > > +
-> > +	gic: interrupt-controller at 12001000 {
+> > +	gic: interrupt-controller@12001000 {
 > > +		compatible = "arm,gic-400";
 > > +		reg = <0 0x12001000 0 0x1000>,
 > > +		      <0 0x12002000 0 0x2000>,
@@ -227,7 +227,7 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 > > +	};
 > > +
 > > +	soc {
-> > +		soc_funnel: funnel at 10001000 {
+> > +		soc_funnel: funnel@10001000 {
 > 
 > There is no need for a label ("soc_funnel) before the device name if that
 > device is not referenced elsewhere in the DTS.  The same comment applies to most
@@ -237,28 +237,28 @@ On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:
 OK, I will remove these labels from this DT.
 And there's another issue I'd like to discuss with you, do you think which way is better:
 1) use class name which can represent this kind of components as device node name in DT, e.g.
-	funnel at ... {
+	funnel@... {
 
 	}
-	replicator at ... {
+	replicator@... {
 
 	}
-	etb at ... {
+	etb@... {
 
 	}
-	etf at ...
-	etm at ...
-	stm at ...
+	etf@...
+	etm@...
+	stm@...
 
 2) use more descriptive device name for those which are more than one on
 a SoC, e.g.
-	soc-funnel at ... {
+	soc-funnel@... {
 
 	}
-	cluster0-funnel at ... {
+	cluster0-funnel@... {
 
 	}
-	cluster1-funnel at ... {
+	cluster1-funnel@... {
 
 	}
 
@@ -275,14 +275,14 @@ Chunyan
 > > +				#address-cells = <1>;
 > > +				#size-cells = <0>;
 > > +
-> > +				port at 0 {
+> > +				port@0 {
 > > +					reg = <0>;
 > > +					soc_funnel_out_port: endpoint {
 > > +						remote-endpoint = <&etb_in>;
 > > +					};
 > > +				};
 > > +
-> > +				port at 1 {
+> > +				port@1 {
 > > +					reg = <0>;
 > > +					soc_funnel_in_port: endpoint {
 > > +						slave-mode;
@@ -293,7 +293,7 @@ Chunyan
 > > +			};
 > > +		};
 > > +
-> > +		etb at 10003000 {
+> > +		etb@10003000 {
 > > +			compatible = "arm,coresight-tmc", "arm,primecell";
 > > +			reg = <0 0x10003000 0 0x1000>;
 > > +			clocks = <&ext_26m>;
@@ -307,7 +307,7 @@ Chunyan
 > > +			};
 > > +		};
 > > +
-> > +		cluster0_funnel: funnel at 11001000 {
+> > +		cluster0_funnel: funnel@11001000 {
 > > +			compatible = "arm,coresight-funnel", "arm,primecell";
 > > +			reg = <0 0x11001000 0 0x1000>;
 > > +			clocks = <&ext_26m>;
@@ -316,7 +316,7 @@ Chunyan
 > > +				#address-cells = <1>;
 > > +				#size-cells = <0>;
 > > +
-> > +				port at 0 {
+> > +				port@0 {
 > > +					reg = <0>;
 > > +					cluster0_funnel_out_port: endpoint {
 > > +						remote-endpoint =
@@ -324,7 +324,7 @@ Chunyan
 > > +					};
 > > +				};
 > > +
-> > +				port at 1 {
+> > +				port@1 {
 > > +					reg = <0>;
 > > +					cluster0_funnel_in_port0: endpoint {
 > > +						slave-mode;
@@ -332,7 +332,7 @@ Chunyan
 > > +					};
 > > +				};
 > > +
-> > +				port at 2 {
+> > +				port@2 {
 > > +					reg = <1>;
 > > +					cluster0_funnel_in_port1: endpoint {
 > > +						slave-mode;
@@ -340,7 +340,7 @@ Chunyan
 > > +					};
 > > +				};
 > > +
-> > +				port at 3 {
+> > +				port@3 {
 > > +					reg = <2>;
 > > +					cluster0_funnel_in_port2: endpoint {
 > > +						slave-mode;
@@ -348,7 +348,7 @@ Chunyan
 > > +					};
 > > +				};
 > > +
-> > +				port at 4 {
+> > +				port@4 {
 > > +					reg = <4>;
 > > +					cluster0_funnel_in_port3: endpoint {
 > > +						slave-mode;
@@ -358,7 +358,7 @@ Chunyan
 > > +			};
 > > +		};
 > > +
-> > +		cluster1_funnel: funnel at 11002000 {
+> > +		cluster1_funnel: funnel@11002000 {
 > > +			compatible = "arm,coresight-funnel", "arm,primecell";
 > > +			reg = <0 0x11002000 0 0x1000>;
 > > +			clocks = <&ext_26m>;
@@ -367,7 +367,7 @@ Chunyan
 > > +				#address-cells = <1>;
 > > +				#size-cells = <0>;
 > > +
-> > +				port at 0 {
+> > +				port@0 {
 > > +					reg = <0>;
 > > +					cluster1_funnel_out_port: endpoint {
 > > +						remote-endpoint =
@@ -375,7 +375,7 @@ Chunyan
 > > +					};
 > > +				};
 > > +
-> > +				port at 1 {
+> > +				port@1 {
 > > +					reg = <0>;
 > > +					cluster1_funnel_in_port0: endpoint {
 > > +						slave-mode;
@@ -383,7 +383,7 @@ Chunyan
 > > +					};
 > > +				};
 > > +
-> > +				port at 2 {
+> > +				port@2 {
 > > +					reg = <1>;
 > > +					cluster1_funnel_in_port1: endpoint {
 > > +						slave-mode;
@@ -391,7 +391,7 @@ Chunyan
 > > +					};
 > > +				};
 > > +
-> > +				port at 3 {
+> > +				port@3 {
 > > +					reg = <2>;
 > > +					cluster1_funnel_in_port2: endpoint {
 > > +						slave-mode;
@@ -399,7 +399,7 @@ Chunyan
 > > +					};
 > > +				};
 > > +
-> > +				port at 4 {
+> > +				port@4 {
 > > +					reg = <3>;
 > > +					cluster1_funnel_in_port3: endpoint {
 > > +						slave-mode;
@@ -409,20 +409,20 @@ Chunyan
 > > +			};
 > > +		};
 > > +
-> > +		cluster0_etf: etf at 11003000 {
+> > +		cluster0_etf: etf@11003000 {
 > > +			compatible = "arm,coresight-tmc", "arm,primecell";
 > > +			reg = <0 0x11003000 0 0x1000>;
 > > +			clocks = <&ext_26m>;
 > > +			clock-names = "apb_pclk";
 > > +
-> > +			port at 0 {
+> > +			port@0 {
 > > +				cluster0_etf_out: endpoint {
 > > +					remote-endpoint =
 > > +						<&main_funnel_in_port0>;
 > > +				};
 > > +			};
 > > +
-> > +			port at 1 {
+> > +			port@1 {
 > > +				cluster0_etf_in: endpoint {
 > > +					slave-mode;
 > > +					remote-endpoint =
@@ -431,20 +431,20 @@ Chunyan
 > > +			};
 > > +		};
 > > +
-> > +		cluster1_etf: etf at 11004000 {
+> > +		cluster1_etf: etf@11004000 {
 > > +			compatible = "arm,coresight-tmc", "arm,primecell";
 > > +			reg = <0 0x11004000 0 0x1000>;
 > > +			clocks = <&ext_26m>;
 > > +			clock-names = "apb_pclk";
 > > +
-> > +			port at 0 {
+> > +			port@0 {
 > > +				cluster1_etf_out: endpoint {
 > > +					remote-endpoint =
 > > +						<&main_funnel_in_port1>;
 > > +				};
 > > +			};
 > > +
-> > +			port at 1 {
+> > +			port@1 {
 > > +				cluster1_etf_in: endpoint {
 > > +					slave-mode;
 > > +					remote-endpoint =
@@ -456,9 +456,9 @@ Chunyan
 > When more than one port is present it is customary to add another level of
 > imbrication like it is done for funnels above:
 >                          "ports {"
->                                 port at 0 {
+>                                 port@0 {
 >                                 ...
->                                 port at 1 {
+>                                 port@1 {
 >                                 ...
 >                         }
 > 
@@ -468,7 +468,7 @@ Chunyan
 OK.
 
 > > +
-> > +		main_funnel: funnel at 11005000 {
+> > +		main_funnel: funnel@11005000 {
 > > +			compatible = "arm,coresight-funnel", "arm,primecell";
 > > +			reg = <0 0x11005000 0 0x1000>;
 > > +			clocks = <&ext_26m>;
@@ -478,7 +478,7 @@ OK.
 > > +				#address-cells = <1>;
 > > +				#size-cells = <0>;
 > > +
-> > +				port at 0 {
+> > +				port@0 {
 > > +					reg = <0>;
 > > +					main_funnel_out_port: endpoint {
 > > +						remote-endpoint =
@@ -486,7 +486,7 @@ OK.
 > > +					};
 > > +				};
 > > +
-> > +				port at 1 {
+> > +				port@1 {
 > > +					reg = <0>;
 > > +					main_funnel_in_port0: endpoint {
 > > +						slave-mode;
@@ -495,7 +495,7 @@ OK.
 > > +					};
 > > +				};
 > > +
-> > +				port at 2 {
+> > +				port@2 {
 > > +					reg = <1>;
 > > +					main_funnel_in_port1: endpoint {
 > > +						slave-mode;
@@ -506,7 +506,7 @@ OK.
 > > +			};
 > > +		};
 > > +
-> > +		etm at 11440000 {
+> > +		etm@11440000 {
 > > +			compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +			reg = <0 0x11440000 0 0x1000>;
 > > +			cpu = <&CPU0>;
@@ -521,7 +521,7 @@ OK.
 > > +			};
 > > +		};
 > > +
-> > +		etm at 11540000 {
+> > +		etm@11540000 {
 > > +			compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +			reg = <0 0x11540000 0 0x1000>;
 > > +			cpu = <&CPU1>;
@@ -536,7 +536,7 @@ OK.
 > > +			};
 > > +		};
 > > +
-> > +		etm at 11640000 {
+> > +		etm@11640000 {
 > > +			compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +			reg = <0 0x11640000 0 0x1000>;
 > > +			cpu = <&CPU2>;
@@ -551,7 +551,7 @@ OK.
 > > +			};
 > > +		};
 > > +
-> > +		etm at 11740000 {
+> > +		etm@11740000 {
 > > +			compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +			reg = <0 0x11740000 0 0x1000>;
 > > +			cpu = <&CPU3>;
@@ -566,7 +566,7 @@ OK.
 > > +			};
 > > +		};
 > > +
-> > +		etm at 11840000 {
+> > +		etm@11840000 {
 > > +			compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +			reg = <0 0x11840000 0 0x1000>;
 > > +			cpu = <&CPU4>;
@@ -581,7 +581,7 @@ OK.
 > > +			};
 > > +		};
 > > +
-> > +		etm at 11940000 {
+> > +		etm@11940000 {
 > > +			compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +			reg = <0 0x11940000 0 0x1000>;
 > > +			cpu = <&CPU5>;
@@ -596,7 +596,7 @@ OK.
 > > +			};
 > > +		};
 > > +
-> > +		etm at 11a40000 {
+> > +		etm@11a40000 {
 > > +			compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +			reg = <0 0x11a40000 0 0x1000>;
 > > +			cpu = <&CPU6>;
@@ -611,7 +611,7 @@ OK.
 > > +			};
 > > +		};
 > > +
-> > +		etm at 11b40000 {
+> > +		etm@11b40000 {
 > > +			compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +			reg = <0 0x11b40000 0 0x1000>;
 > > +			cpu = <&CPU7>;
@@ -720,7 +720,7 @@ OK.
 > > +			#size-cells = <1>;
 > > +			ranges = <0 0x0 0x70000000 0x10000000>;
 > > +
-> > +			uart0: serial at 70000000 {
+> > +			uart0: serial@70000000 {
 > > +				compatible = "sprd,sc9838-uart",
 > > +					     "sprd,sc9836-uart";
 > > +				reg = <0x000000 0x100>;
@@ -729,7 +729,7 @@ OK.
 > > +				status = "disabled";
 > > +			};
 > > +
-> > +			uart1: serial at 70100000 {
+> > +			uart1: serial@70100000 {
 > > +				compatible = "sprd,sc9838-uart",
 > > +					     "sprd,sc9836-uart";
 > > +				reg = <0x100000 0x100>;
@@ -738,7 +738,7 @@ OK.
 > > +				status = "disabled";
 > > +			};
 > > +
-> > +			uart2: serial at 70200000 {
+> > +			uart2: serial@70200000 {
 > > +				compatible = "sprd,sc9838-uart",
 > > +					     "sprd,sc9836-uart";
 > > +				reg = <0x200000 0x100>;
@@ -747,7 +747,7 @@ OK.
 > > +				status = "disabled";
 > > +			};
 > > +
-> > +			uart3: serial at 70300000 {
+> > +			uart3: serial@70300000 {
 > > +				compatible = "sprd,sc9838-uart",
 > > +					     "sprd,sc9836-uart";
 > > +				reg = <0x300000 0x100>;
@@ -771,5 +771,9 @@ OK.
 > > 
 > > _______________________________________________
 > > linux-arm-kernel mailing list
-> > linux-arm-kernel at lists.infradead.org
+> > linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
 > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 58484c8..cfd4f4e 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,17 +1,30 @@
  "ref\01487660104-15693-1-git-send-email-chunyan.zhang@spreadtrum.com\0"
  "ref\01487660104-15693-2-git-send-email-chunyan.zhang@spreadtrum.com\0"
  "ref\020170221162744.GA29581@linaro.org\0"
- "From\0chunyan.zhang@spreadtrum.com (Chunyan Zhang)\0"
- "Subject\0[PATCH V2 1/3] arm64: dts: Add basic DT to support Spreadtrum's SP9860G\0"
+ "ref\020170221162744.GA29581-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org\0"
+ "From\0Chunyan Zhang <chunyan.zhang-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>\0"
+ "Subject\0Re: [PATCH V2 1/3] arm64: dts: Add basic DT to support Spreadtrum's SP9860G\0"
  "Date\0Wed, 22 Feb 2017 11:46:33 +0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Mathieu Poirier <mathieu.poirier-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0"
+ "Cc\0robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
+  mark.rutland-5wv7dgnIgG8@public.gmane.org
+  gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org
+  catalin.marinas-5wv7dgnIgG8@public.gmane.org
+  will.deacon-5wv7dgnIgG8@public.gmane.org
+  arnd-r2nGTMty4D4@public.gmane.org
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  orson.zhai-lxIno14LUO0EEoCn2XhGlw@public.gmane.org
+  zhang.lyra-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  sudeep.holla-5wv7dgnIgG8@public.gmane.org
+ " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "Hello Mathieu,\n"
  "\n"
- "On ?,  2? 21, 2017 at 09:27:44?? -0700, Mathieu Poirier wrote:\n"
+ "On \344\272\214,  2\346\234\210 21, 2017 at 09:27:44\344\270\212\345\215\210 -0700, Mathieu Poirier wrote:\n"
  "> On Tue, Feb 21, 2017 at 02:55:02PM +0800, Chunyan Zhang wrote:\n"
- "> > From: Orson Zhai <orson.zhai@spreadtrum.com>\n"
+ "> > From: Orson Zhai <orson.zhai-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>\n"
  "> \n"
  "> Hello Chunyan,\n"
  "> \n"
@@ -22,8 +35,8 @@
  "> > peripherals IP nodes, sc9860.dtsi contains stuff related to ARM core stuff\n"
  "> > and sp9860g dts is for the board level.\n"
  "> > \n"
- "> > Signed-off-by: Orson Zhai <orson.zhai@spreadtrum.com>\n"
- "> > Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>\n"
+ "> > Signed-off-by: Orson Zhai <orson.zhai-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>\n"
+ "> > Signed-off-by: Chunyan Zhang <chunyan.zhang-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>\n"
  "> > ---\n"
  "> >  arch/arm64/boot/dts/sprd/Makefile         |   3 +-\n"
  "> >  arch/arm64/boot/dts/sprd/sc9860.dtsi      | 531 ++++++++++++++++++++++++++++++\n"
@@ -99,7 +112,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tCPU0: cpu at 530000 {\n"
+ "> > +\t\tCPU0: cpu@530000 {\n"
  "> > +\t\t\tdevice_type = \"cpu\";\n"
  "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +\t\t\treg = <0x0 0x530000>;\n"
@@ -107,7 +120,7 @@
  "> > +\t\t\tcpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tCPU1: cpu at 530001 {\n"
+ "> > +\t\tCPU1: cpu@530001 {\n"
  "> > +\t\t\tdevice_type = \"cpu\";\n"
  "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +\t\t\treg = <0x0 0x530001>;\n"
@@ -115,7 +128,7 @@
  "> > +\t\t\tcpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tCPU2: cpu at 530002 {\n"
+ "> > +\t\tCPU2: cpu@530002 {\n"
  "> > +\t\t\tdevice_type = \"cpu\";\n"
  "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +\t\t\treg = <0x0 0x530002>;\n"
@@ -123,7 +136,7 @@
  "> > +\t\t\tcpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tCPU3: cpu at 530003 {\n"
+ "> > +\t\tCPU3: cpu@530003 {\n"
  "> > +\t\t\tdevice_type = \"cpu\";\n"
  "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +\t\t\treg = <0x0 0x530003>;\n"
@@ -131,7 +144,7 @@
  "> > +\t\t\tcpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tCPU4: cpu at 530100 {\n"
+ "> > +\t\tCPU4: cpu@530100 {\n"
  "> > +\t\t\tdevice_type = \"cpu\";\n"
  "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +\t\t\treg = <0x0 0x530100>;\n"
@@ -139,7 +152,7 @@
  "> > +\t\t\tcpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tCPU5: cpu at 530101 {\n"
+ "> > +\t\tCPU5: cpu@530101 {\n"
  "> > +\t\t\tdevice_type = \"cpu\";\n"
  "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +\t\t\treg = <0x0 0x530101>;\n"
@@ -147,7 +160,7 @@
  "> > +\t\t\tcpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tCPU6: cpu at 530102 {\n"
+ "> > +\t\tCPU6: cpu@530102 {\n"
  "> > +\t\t\tdevice_type = \"cpu\";\n"
  "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +\t\t\treg = <0x0 0x530102>;\n"
@@ -155,7 +168,7 @@
  "> > +\t\t\tcpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tCPU7: cpu at 530103 {\n"
+ "> > +\t\tCPU7: cpu@530103 {\n"
  "> > +\t\t\tdevice_type = \"cpu\";\n"
  "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +\t\t\treg = <0x0 0x530103>;\n"
@@ -186,7 +199,7 @@
  "> > +\t\t};\n"
  "> > +\t};\n"
  "> > +\n"
- "> > +\tgic: interrupt-controller at 12001000 {\n"
+ "> > +\tgic: interrupt-controller@12001000 {\n"
  "> > +\t\tcompatible = \"arm,gic-400\";\n"
  "> > +\t\treg = <0 0x12001000 0 0x1000>,\n"
  "> > +\t\t      <0 0x12002000 0 0x2000>,\n"
@@ -236,7 +249,7 @@
  "> > +\t};\n"
  "> > +\n"
  "> > +\tsoc {\n"
- "> > +\t\tsoc_funnel: funnel at 10001000 {\n"
+ "> > +\t\tsoc_funnel: funnel@10001000 {\n"
  "> \n"
  "> There is no need for a label (\"soc_funnel) before the device name if that\n"
  "> device is not referenced elsewhere in the DTS.  The same comment applies to most\n"
@@ -246,28 +259,28 @@
  "OK, I will remove these labels from this DT.\n"
  "And there's another issue I'd like to discuss with you, do you think which way is better:\n"
  "1) use class name which can represent this kind of components as device node name in DT, e.g.\n"
- "\tfunnel at ... {\n"
+ "\tfunnel@... {\n"
  "\n"
  "\t}\n"
- "\treplicator at ... {\n"
+ "\treplicator@... {\n"
  "\n"
  "\t}\n"
- "\tetb at ... {\n"
+ "\tetb@... {\n"
  "\n"
  "\t}\n"
- "\tetf at ...\n"
- "\tetm at ...\n"
- "\tstm at ...\n"
+ "\tetf@...\n"
+ "\tetm@...\n"
+ "\tstm@...\n"
  "\n"
  "2) use more descriptive device name for those which are more than one on\n"
  "a SoC, e.g.\n"
- "\tsoc-funnel at ... {\n"
+ "\tsoc-funnel@... {\n"
  "\n"
  "\t}\n"
- "\tcluster0-funnel at ... {\n"
+ "\tcluster0-funnel@... {\n"
  "\n"
  "\t}\n"
- "\tcluster1-funnel at ... {\n"
+ "\tcluster1-funnel@... {\n"
  "\n"
  "\t}\n"
  "\n"
@@ -284,14 +297,14 @@
  "> > +\t\t\t\t#address-cells = <1>;\n"
  "> > +\t\t\t\t#size-cells = <0>;\n"
  "> > +\n"
- "> > +\t\t\t\tport at 0 {\n"
+ "> > +\t\t\t\tport@0 {\n"
  "> > +\t\t\t\t\treg = <0>;\n"
  "> > +\t\t\t\t\tsoc_funnel_out_port: endpoint {\n"
  "> > +\t\t\t\t\t\tremote-endpoint = <&etb_in>;\n"
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 1 {\n"
+ "> > +\t\t\t\tport@1 {\n"
  "> > +\t\t\t\t\treg = <0>;\n"
  "> > +\t\t\t\t\tsoc_funnel_in_port: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -302,7 +315,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tetb at 10003000 {\n"
+ "> > +\t\tetb@10003000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-tmc\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x10003000 0 0x1000>;\n"
  "> > +\t\t\tclocks = <&ext_26m>;\n"
@@ -316,7 +329,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tcluster0_funnel: funnel at 11001000 {\n"
+ "> > +\t\tcluster0_funnel: funnel@11001000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-funnel\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11001000 0 0x1000>;\n"
  "> > +\t\t\tclocks = <&ext_26m>;\n"
@@ -325,7 +338,7 @@
  "> > +\t\t\t\t#address-cells = <1>;\n"
  "> > +\t\t\t\t#size-cells = <0>;\n"
  "> > +\n"
- "> > +\t\t\t\tport at 0 {\n"
+ "> > +\t\t\t\tport@0 {\n"
  "> > +\t\t\t\t\treg = <0>;\n"
  "> > +\t\t\t\t\tcluster0_funnel_out_port: endpoint {\n"
  "> > +\t\t\t\t\t\tremote-endpoint =\n"
@@ -333,7 +346,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 1 {\n"
+ "> > +\t\t\t\tport@1 {\n"
  "> > +\t\t\t\t\treg = <0>;\n"
  "> > +\t\t\t\t\tcluster0_funnel_in_port0: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -341,7 +354,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 2 {\n"
+ "> > +\t\t\t\tport@2 {\n"
  "> > +\t\t\t\t\treg = <1>;\n"
  "> > +\t\t\t\t\tcluster0_funnel_in_port1: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -349,7 +362,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 3 {\n"
+ "> > +\t\t\t\tport@3 {\n"
  "> > +\t\t\t\t\treg = <2>;\n"
  "> > +\t\t\t\t\tcluster0_funnel_in_port2: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -357,7 +370,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 4 {\n"
+ "> > +\t\t\t\tport@4 {\n"
  "> > +\t\t\t\t\treg = <4>;\n"
  "> > +\t\t\t\t\tcluster0_funnel_in_port3: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -367,7 +380,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tcluster1_funnel: funnel at 11002000 {\n"
+ "> > +\t\tcluster1_funnel: funnel@11002000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-funnel\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11002000 0 0x1000>;\n"
  "> > +\t\t\tclocks = <&ext_26m>;\n"
@@ -376,7 +389,7 @@
  "> > +\t\t\t\t#address-cells = <1>;\n"
  "> > +\t\t\t\t#size-cells = <0>;\n"
  "> > +\n"
- "> > +\t\t\t\tport at 0 {\n"
+ "> > +\t\t\t\tport@0 {\n"
  "> > +\t\t\t\t\treg = <0>;\n"
  "> > +\t\t\t\t\tcluster1_funnel_out_port: endpoint {\n"
  "> > +\t\t\t\t\t\tremote-endpoint =\n"
@@ -384,7 +397,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 1 {\n"
+ "> > +\t\t\t\tport@1 {\n"
  "> > +\t\t\t\t\treg = <0>;\n"
  "> > +\t\t\t\t\tcluster1_funnel_in_port0: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -392,7 +405,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 2 {\n"
+ "> > +\t\t\t\tport@2 {\n"
  "> > +\t\t\t\t\treg = <1>;\n"
  "> > +\t\t\t\t\tcluster1_funnel_in_port1: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -400,7 +413,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 3 {\n"
+ "> > +\t\t\t\tport@3 {\n"
  "> > +\t\t\t\t\treg = <2>;\n"
  "> > +\t\t\t\t\tcluster1_funnel_in_port2: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -408,7 +421,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 4 {\n"
+ "> > +\t\t\t\tport@4 {\n"
  "> > +\t\t\t\t\treg = <3>;\n"
  "> > +\t\t\t\t\tcluster1_funnel_in_port3: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -418,20 +431,20 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tcluster0_etf: etf at 11003000 {\n"
+ "> > +\t\tcluster0_etf: etf@11003000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-tmc\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11003000 0 0x1000>;\n"
  "> > +\t\t\tclocks = <&ext_26m>;\n"
  "> > +\t\t\tclock-names = \"apb_pclk\";\n"
  "> > +\n"
- "> > +\t\t\tport at 0 {\n"
+ "> > +\t\t\tport@0 {\n"
  "> > +\t\t\t\tcluster0_etf_out: endpoint {\n"
  "> > +\t\t\t\t\tremote-endpoint =\n"
  "> > +\t\t\t\t\t\t<&main_funnel_in_port0>;\n"
  "> > +\t\t\t\t};\n"
  "> > +\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\tport at 1 {\n"
+ "> > +\t\t\tport@1 {\n"
  "> > +\t\t\t\tcluster0_etf_in: endpoint {\n"
  "> > +\t\t\t\t\tslave-mode;\n"
  "> > +\t\t\t\t\tremote-endpoint =\n"
@@ -440,20 +453,20 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tcluster1_etf: etf at 11004000 {\n"
+ "> > +\t\tcluster1_etf: etf@11004000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-tmc\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11004000 0 0x1000>;\n"
  "> > +\t\t\tclocks = <&ext_26m>;\n"
  "> > +\t\t\tclock-names = \"apb_pclk\";\n"
  "> > +\n"
- "> > +\t\t\tport at 0 {\n"
+ "> > +\t\t\tport@0 {\n"
  "> > +\t\t\t\tcluster1_etf_out: endpoint {\n"
  "> > +\t\t\t\t\tremote-endpoint =\n"
  "> > +\t\t\t\t\t\t<&main_funnel_in_port1>;\n"
  "> > +\t\t\t\t};\n"
  "> > +\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\tport at 1 {\n"
+ "> > +\t\t\tport@1 {\n"
  "> > +\t\t\t\tcluster1_etf_in: endpoint {\n"
  "> > +\t\t\t\t\tslave-mode;\n"
  "> > +\t\t\t\t\tremote-endpoint =\n"
@@ -465,9 +478,9 @@
  "> When more than one port is present it is customary to add another level of\n"
  "> imbrication like it is done for funnels above:\n"
  ">                          \"ports {\"\n"
- ">                                 port at 0 {\n"
+ ">                                 port@0 {\n"
  ">                                 ...\n"
- ">                                 port at 1 {\n"
+ ">                                 port@1 {\n"
  ">                                 ...\n"
  ">                         }\n"
  "> \n"
@@ -477,7 +490,7 @@
  "OK.\n"
  "\n"
  "> > +\n"
- "> > +\t\tmain_funnel: funnel at 11005000 {\n"
+ "> > +\t\tmain_funnel: funnel@11005000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-funnel\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11005000 0 0x1000>;\n"
  "> > +\t\t\tclocks = <&ext_26m>;\n"
@@ -487,7 +500,7 @@
  "> > +\t\t\t\t#address-cells = <1>;\n"
  "> > +\t\t\t\t#size-cells = <0>;\n"
  "> > +\n"
- "> > +\t\t\t\tport at 0 {\n"
+ "> > +\t\t\t\tport@0 {\n"
  "> > +\t\t\t\t\treg = <0>;\n"
  "> > +\t\t\t\t\tmain_funnel_out_port: endpoint {\n"
  "> > +\t\t\t\t\t\tremote-endpoint =\n"
@@ -495,7 +508,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 1 {\n"
+ "> > +\t\t\t\tport@1 {\n"
  "> > +\t\t\t\t\treg = <0>;\n"
  "> > +\t\t\t\t\tmain_funnel_in_port0: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -504,7 +517,7 @@
  "> > +\t\t\t\t\t};\n"
  "> > +\t\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\t\tport at 2 {\n"
+ "> > +\t\t\t\tport@2 {\n"
  "> > +\t\t\t\t\treg = <1>;\n"
  "> > +\t\t\t\t\tmain_funnel_in_port1: endpoint {\n"
  "> > +\t\t\t\t\t\tslave-mode;\n"
@@ -515,7 +528,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tetm at 11440000 {\n"
+ "> > +\t\tetm@11440000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11440000 0 0x1000>;\n"
  "> > +\t\t\tcpu = <&CPU0>;\n"
@@ -530,7 +543,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tetm at 11540000 {\n"
+ "> > +\t\tetm@11540000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11540000 0 0x1000>;\n"
  "> > +\t\t\tcpu = <&CPU1>;\n"
@@ -545,7 +558,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tetm at 11640000 {\n"
+ "> > +\t\tetm@11640000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11640000 0 0x1000>;\n"
  "> > +\t\t\tcpu = <&CPU2>;\n"
@@ -560,7 +573,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tetm at 11740000 {\n"
+ "> > +\t\tetm@11740000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11740000 0 0x1000>;\n"
  "> > +\t\t\tcpu = <&CPU3>;\n"
@@ -575,7 +588,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tetm at 11840000 {\n"
+ "> > +\t\tetm@11840000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11840000 0 0x1000>;\n"
  "> > +\t\t\tcpu = <&CPU4>;\n"
@@ -590,7 +603,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tetm at 11940000 {\n"
+ "> > +\t\tetm@11940000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11940000 0 0x1000>;\n"
  "> > +\t\t\tcpu = <&CPU5>;\n"
@@ -605,7 +618,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tetm at 11a40000 {\n"
+ "> > +\t\tetm@11a40000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11a40000 0 0x1000>;\n"
  "> > +\t\t\tcpu = <&CPU6>;\n"
@@ -620,7 +633,7 @@
  "> > +\t\t\t};\n"
  "> > +\t\t};\n"
  "> > +\n"
- "> > +\t\tetm at 11b40000 {\n"
+ "> > +\t\tetm@11b40000 {\n"
  "> > +\t\t\tcompatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +\t\t\treg = <0 0x11b40000 0 0x1000>;\n"
  "> > +\t\t\tcpu = <&CPU7>;\n"
@@ -729,7 +742,7 @@
  "> > +\t\t\t#size-cells = <1>;\n"
  "> > +\t\t\tranges = <0 0x0 0x70000000 0x10000000>;\n"
  "> > +\n"
- "> > +\t\t\tuart0: serial at 70000000 {\n"
+ "> > +\t\t\tuart0: serial@70000000 {\n"
  "> > +\t\t\t\tcompatible = \"sprd,sc9838-uart\",\n"
  "> > +\t\t\t\t\t     \"sprd,sc9836-uart\";\n"
  "> > +\t\t\t\treg = <0x000000 0x100>;\n"
@@ -738,7 +751,7 @@
  "> > +\t\t\t\tstatus = \"disabled\";\n"
  "> > +\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\tuart1: serial at 70100000 {\n"
+ "> > +\t\t\tuart1: serial@70100000 {\n"
  "> > +\t\t\t\tcompatible = \"sprd,sc9838-uart\",\n"
  "> > +\t\t\t\t\t     \"sprd,sc9836-uart\";\n"
  "> > +\t\t\t\treg = <0x100000 0x100>;\n"
@@ -747,7 +760,7 @@
  "> > +\t\t\t\tstatus = \"disabled\";\n"
  "> > +\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\tuart2: serial at 70200000 {\n"
+ "> > +\t\t\tuart2: serial@70200000 {\n"
  "> > +\t\t\t\tcompatible = \"sprd,sc9838-uart\",\n"
  "> > +\t\t\t\t\t     \"sprd,sc9836-uart\";\n"
  "> > +\t\t\t\treg = <0x200000 0x100>;\n"
@@ -756,7 +769,7 @@
  "> > +\t\t\t\tstatus = \"disabled\";\n"
  "> > +\t\t\t};\n"
  "> > +\n"
- "> > +\t\t\tuart3: serial at 70300000 {\n"
+ "> > +\t\t\tuart3: serial@70300000 {\n"
  "> > +\t\t\t\tcompatible = \"sprd,sc9838-uart\",\n"
  "> > +\t\t\t\t\t     \"sprd,sc9836-uart\";\n"
  "> > +\t\t\t\treg = <0x300000 0x100>;\n"
@@ -780,7 +793,11 @@
  "> > \n"
  "> > _______________________________________________\n"
  "> > linux-arm-kernel mailing list\n"
- "> > linux-arm-kernel at lists.infradead.org\n"
- > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
+ "> > linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\n"
+ "> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-fa9ffd93ae219469b5520469047563a450da5224f797ef68501d3e843352976a
+25e8f84110d294ef89bf0c18964ff99a8c631fa8f5d06bd0152fdaa71ea849f3
