diff for duplicates of <20170224075725.GA32714@spreadtrum.com>

diff --git a/a/1.txt b/N1/1.txt
index b14cfb5..938e8d4 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-On ?,  2? 23, 2017 at 06:00:20?? -0600, Rob Herring wrote:
+On 四,  2月 23, 2017 at 06:00:20下午 -0600, Rob Herring wrote:
 > On Tue, Feb 21, 2017 at 12:55 AM, Chunyan Zhang
 > <chunyan.zhang@spreadtrum.com> wrote:
 > > From: Orson Zhai <orson.zhai@spreadtrum.com>
@@ -97,7 +97,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +                       };
 > > +               };
 > > +
-> > +               CPU0: cpu at 530000 {
+> > +               CPU0: cpu@530000 {
 > > +                       device_type = "cpu";
 > > +                       compatible = "arm,cortex-a53", "arm,armv8";
 > > +                       reg = <0x0 0x530000>;
@@ -105,7 +105,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +               };
 > > +
-> > +               CPU1: cpu at 530001 {
+> > +               CPU1: cpu@530001 {
 > > +                       device_type = "cpu";
 > > +                       compatible = "arm,cortex-a53", "arm,armv8";
 > > +                       reg = <0x0 0x530001>;
@@ -113,7 +113,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +               };
 > > +
-> > +               CPU2: cpu at 530002 {
+> > +               CPU2: cpu@530002 {
 > > +                       device_type = "cpu";
 > > +                       compatible = "arm,cortex-a53", "arm,armv8";
 > > +                       reg = <0x0 0x530002>;
@@ -121,7 +121,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +               };
 > > +
-> > +               CPU3: cpu at 530003 {
+> > +               CPU3: cpu@530003 {
 > > +                       device_type = "cpu";
 > > +                       compatible = "arm,cortex-a53", "arm,armv8";
 > > +                       reg = <0x0 0x530003>;
@@ -129,7 +129,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +               };
 > > +
-> > +               CPU4: cpu at 530100 {
+> > +               CPU4: cpu@530100 {
 > > +                       device_type = "cpu";
 > > +                       compatible = "arm,cortex-a53", "arm,armv8";
 > > +                       reg = <0x0 0x530100>;
@@ -137,7 +137,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +               };
 > > +
-> > +               CPU5: cpu at 530101 {
+> > +               CPU5: cpu@530101 {
 > > +                       device_type = "cpu";
 > > +                       compatible = "arm,cortex-a53", "arm,armv8";
 > > +                       reg = <0x0 0x530101>;
@@ -145,7 +145,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +               };
 > > +
-> > +               CPU6: cpu at 530102 {
+> > +               CPU6: cpu@530102 {
 > > +                       device_type = "cpu";
 > > +                       compatible = "arm,cortex-a53", "arm,armv8";
 > > +                       reg = <0x0 0x530102>;
@@ -153,7 +153,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
 > > +               };
 > > +
-> > +               CPU7: cpu at 530103 {
+> > +               CPU7: cpu@530103 {
 > > +                       device_type = "cpu";
 > > +                       compatible = "arm,cortex-a53", "arm,armv8";
 > > +                       reg = <0x0 0x530103>;
@@ -184,7 +184,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +               };
 > > +       };
 > > +
-> > +       gic: interrupt-controller at 12001000 {
+> > +       gic: interrupt-controller@12001000 {
 > > +               compatible = "arm,gic-400";
 > > +               reg = <0 0x12001000 0 0x1000>,
 > > +                     <0 0x12002000 0 0x2000>,
@@ -234,7 +234,7 @@ Will this file still be licensed under the same terms it was, right?
 > > +       };
 > > +
 > > +       soc {
-> > +               soc_funnel: funnel at 10001000 {
+> > +               soc_funnel: funnel@10001000 {
 > > +                       compatible = "arm,coresight-funnel", "arm,primecell";
 > > +                       reg = <0 0x10001000 0 0x1000>;
 > 
@@ -252,14 +252,14 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                               #address-cells = <1>;
 > > +                               #size-cells = <0>;
 > > +
-> > +                               port at 0 {
+> > +                               port@0 {
 > > +                                       reg = <0>;
 > > +                                       soc_funnel_out_port: endpoint {
 > > +                                               remote-endpoint = <&etb_in>;
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 1 {
+> > +                               port@1 {
 > > +                                       reg = <0>;
 > > +                                       soc_funnel_in_port: endpoint {
 > > +                                               slave-mode;
@@ -270,7 +270,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               etb at 10003000 {
+> > +               etb@10003000 {
 > > +                       compatible = "arm,coresight-tmc", "arm,primecell";
 > > +                       reg = <0 0x10003000 0 0x1000>;
 > > +                       clocks = <&ext_26m>;
@@ -284,7 +284,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               cluster0_funnel: funnel at 11001000 {
+> > +               cluster0_funnel: funnel@11001000 {
 > > +                       compatible = "arm,coresight-funnel", "arm,primecell";
 > > +                       reg = <0 0x11001000 0 0x1000>;
 > > +                       clocks = <&ext_26m>;
@@ -293,7 +293,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                               #address-cells = <1>;
 > > +                               #size-cells = <0>;
 > > +
-> > +                               port at 0 {
+> > +                               port@0 {
 > > +                                       reg = <0>;
 > > +                                       cluster0_funnel_out_port: endpoint {
 > > +                                               remote-endpoint =
@@ -301,7 +301,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 1 {
+> > +                               port@1 {
 > > +                                       reg = <0>;
 > > +                                       cluster0_funnel_in_port0: endpoint {
 > > +                                               slave-mode;
@@ -309,7 +309,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 2 {
+> > +                               port@2 {
 > > +                                       reg = <1>;
 > > +                                       cluster0_funnel_in_port1: endpoint {
 > > +                                               slave-mode;
@@ -317,7 +317,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 3 {
+> > +                               port@3 {
 > > +                                       reg = <2>;
 > > +                                       cluster0_funnel_in_port2: endpoint {
 > > +                                               slave-mode;
@@ -325,7 +325,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 4 {
+> > +                               port@4 {
 > > +                                       reg = <4>;
 > > +                                       cluster0_funnel_in_port3: endpoint {
 > > +                                               slave-mode;
@@ -335,7 +335,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               cluster1_funnel: funnel at 11002000 {
+> > +               cluster1_funnel: funnel@11002000 {
 > > +                       compatible = "arm,coresight-funnel", "arm,primecell";
 > > +                       reg = <0 0x11002000 0 0x1000>;
 > > +                       clocks = <&ext_26m>;
@@ -344,7 +344,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                               #address-cells = <1>;
 > > +                               #size-cells = <0>;
 > > +
-> > +                               port at 0 {
+> > +                               port@0 {
 > > +                                       reg = <0>;
 > > +                                       cluster1_funnel_out_port: endpoint {
 > > +                                               remote-endpoint =
@@ -352,7 +352,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 1 {
+> > +                               port@1 {
 > > +                                       reg = <0>;
 > > +                                       cluster1_funnel_in_port0: endpoint {
 > > +                                               slave-mode;
@@ -360,7 +360,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 2 {
+> > +                               port@2 {
 > > +                                       reg = <1>;
 > > +                                       cluster1_funnel_in_port1: endpoint {
 > > +                                               slave-mode;
@@ -368,7 +368,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 3 {
+> > +                               port@3 {
 > > +                                       reg = <2>;
 > > +                                       cluster1_funnel_in_port2: endpoint {
 > > +                                               slave-mode;
@@ -376,7 +376,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 4 {
+> > +                               port@4 {
 > > +                                       reg = <3>;
 > > +                                       cluster1_funnel_in_port3: endpoint {
 > > +                                               slave-mode;
@@ -386,20 +386,20 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               cluster0_etf: etf at 11003000 {
+> > +               cluster0_etf: etf@11003000 {
 > > +                       compatible = "arm,coresight-tmc", "arm,primecell";
 > > +                       reg = <0 0x11003000 0 0x1000>;
 > > +                       clocks = <&ext_26m>;
 > > +                       clock-names = "apb_pclk";
 > > +
-> > +                       port at 0 {
+> > +                       port@0 {
 > > +                               cluster0_etf_out: endpoint {
 > > +                                       remote-endpoint =
 > > +                                               <&main_funnel_in_port0>;
 > > +                               };
 > > +                       };
 > > +
-> > +                       port at 1 {
+> > +                       port@1 {
 > > +                               cluster0_etf_in: endpoint {
 > > +                                       slave-mode;
 > > +                                       remote-endpoint =
@@ -408,20 +408,20 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               cluster1_etf: etf at 11004000 {
+> > +               cluster1_etf: etf@11004000 {
 > > +                       compatible = "arm,coresight-tmc", "arm,primecell";
 > > +                       reg = <0 0x11004000 0 0x1000>;
 > > +                       clocks = <&ext_26m>;
 > > +                       clock-names = "apb_pclk";
 > > +
-> > +                       port at 0 {
+> > +                       port@0 {
 > > +                               cluster1_etf_out: endpoint {
 > > +                                       remote-endpoint =
 > > +                                               <&main_funnel_in_port1>;
 > > +                               };
 > > +                       };
 > > +
-> > +                       port at 1 {
+> > +                       port@1 {
 > > +                               cluster1_etf_in: endpoint {
 > > +                                       slave-mode;
 > > +                                       remote-endpoint =
@@ -430,7 +430,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               main_funnel: funnel at 11005000 {
+> > +               main_funnel: funnel@11005000 {
 > > +                       compatible = "arm,coresight-funnel", "arm,primecell";
 > > +                       reg = <0 0x11005000 0 0x1000>;
 > > +                       clocks = <&ext_26m>;
@@ -440,7 +440,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                               #address-cells = <1>;
 > > +                               #size-cells = <0>;
 > > +
-> > +                               port at 0 {
+> > +                               port@0 {
 > > +                                       reg = <0>;
 > > +                                       main_funnel_out_port: endpoint {
 > > +                                               remote-endpoint =
@@ -448,7 +448,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 1 {
+> > +                               port@1 {
 > > +                                       reg = <0>;
 > > +                                       main_funnel_in_port0: endpoint {
 > > +                                               slave-mode;
@@ -457,7 +457,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                                       };
 > > +                               };
 > > +
-> > +                               port at 2 {
+> > +                               port@2 {
 > > +                                       reg = <1>;
 > > +                                       main_funnel_in_port1: endpoint {
 > > +                                               slave-mode;
@@ -468,7 +468,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               etm at 11440000 {
+> > +               etm@11440000 {
 > > +                       compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +                       reg = <0 0x11440000 0 0x1000>;
 > > +                       cpu = <&CPU0>;
@@ -483,7 +483,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               etm at 11540000 {
+> > +               etm@11540000 {
 > > +                       compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +                       reg = <0 0x11540000 0 0x1000>;
 > > +                       cpu = <&CPU1>;
@@ -498,7 +498,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               etm at 11640000 {
+> > +               etm@11640000 {
 > > +                       compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +                       reg = <0 0x11640000 0 0x1000>;
 > > +                       cpu = <&CPU2>;
@@ -513,7 +513,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               etm at 11740000 {
+> > +               etm@11740000 {
 > > +                       compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +                       reg = <0 0x11740000 0 0x1000>;
 > > +                       cpu = <&CPU3>;
@@ -528,7 +528,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               etm at 11840000 {
+> > +               etm@11840000 {
 > > +                       compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +                       reg = <0 0x11840000 0 0x1000>;
 > > +                       cpu = <&CPU4>;
@@ -543,7 +543,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               etm at 11940000 {
+> > +               etm@11940000 {
 > > +                       compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +                       reg = <0 0x11940000 0 0x1000>;
 > > +                       cpu = <&CPU5>;
@@ -558,7 +558,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               etm at 11a40000 {
+> > +               etm@11a40000 {
 > > +                       compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +                       reg = <0 0x11a40000 0 0x1000>;
 > > +                       cpu = <&CPU6>;
@@ -573,7 +573,7 @@ is 64-bit.  I will add more devices into this device tree later on.
 > > +                       };
 > > +               };
 > > +
-> > +               etm at 11b40000 {
+> > +               etm@11b40000 {
 > > +                       compatible = "arm,coresight-etm4x", "arm,primecell";
 > > +                       reg = <0 0x11b40000 0 0x1000>;
 > > +                       cpu = <&CPU7>;
@@ -689,7 +689,7 @@ address range of this AP APB bus is from 0x70000000 ~ 0x7fffffff.
 
 > 
 > > +
-> > +                       uart0: serial at 70000000 {
+> > +                       uart0: serial@70000000 {
 > > +                               compatible = "sprd,sc9838-uart",
 > > +                                            "sprd,sc9836-uart";
 > > +                               reg = <0x000000 0x100>;
@@ -698,7 +698,7 @@ address range of this AP APB bus is from 0x70000000 ~ 0x7fffffff.
 > > +                               status = "disabled";
 > > +                       };
 > > +
-> > +                       uart1: serial at 70100000 {
+> > +                       uart1: serial@70100000 {
 > > +                               compatible = "sprd,sc9838-uart",
 > > +                                            "sprd,sc9836-uart";
 > > +                               reg = <0x100000 0x100>;
@@ -707,7 +707,7 @@ address range of this AP APB bus is from 0x70000000 ~ 0x7fffffff.
 > > +                               status = "disabled";
 > > +                       };
 > > +
-> > +                       uart2: serial at 70200000 {
+> > +                       uart2: serial@70200000 {
 > > +                               compatible = "sprd,sc9838-uart",
 > > +                                            "sprd,sc9836-uart";
 > > +                               reg = <0x200000 0x100>;
@@ -716,7 +716,7 @@ address range of this AP APB bus is from 0x70000000 ~ 0x7fffffff.
 > > +                               status = "disabled";
 > > +                       };
 > > +
-> > +                       uart3: serial at 70300000 {
+> > +                       uart3: serial@70300000 {
 > > +                               compatible = "sprd,sc9838-uart",
 > > +                                            "sprd,sc9836-uart";
 > > +                               reg = <0x300000 0x100>;
@@ -748,3 +748,8 @@ Chunyan
 > > --
 > > 2.7.4
 > >
+
+_______________________________________________
+linux-arm-kernel mailing list
+linux-arm-kernel@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index ce8a969..417cd18 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,13 +1,24 @@
  "ref\01487660104-15693-1-git-send-email-chunyan.zhang@spreadtrum.com\0"
  "ref\01487660104-15693-2-git-send-email-chunyan.zhang@spreadtrum.com\0"
  "ref\0CAL_JsqJ-VXB8pJw3r_fi9Lbmat2dqH-1jmGy8ibK8=PnoZ-c=Q@mail.gmail.com\0"
- "From\0chunyan.zhang@spreadtrum.com (Chunyan Zhang)\0"
- "Subject\0[PATCH V2 1/3] arm64: dts: Add basic DT to support Spreadtrum's SP9860G\0"
+ "From\0Chunyan Zhang <chunyan.zhang@spreadtrum.com>\0"
+ "Subject\0Re: [PATCH V2 1/3] arm64: dts: Add basic DT to support Spreadtrum's SP9860G\0"
  "Date\0Fri, 24 Feb 2017 15:57:26 +0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Rob Herring <robh+dt@kernel.org>\0"
+ "Cc\0Mark Rutland <mark.rutland@arm.com>"
+  devicetree@vger.kernel.org <devicetree@vger.kernel.org>
+ " Orson Zhai(\347\277\237\344\272\254) <orson.zhai@spreadtrum.com>"
+  Arnd Bergmann <arnd@arndb.de>
+  Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+  Sudeep Holla <sudeep.holla@arm.com>
+  Will Deacon <will.deacon@arm.com>
+  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
+  Lyra Zhang <zhang.lyra@gmail.com>
+  Catalin Marinas <catalin.marinas@arm.com>
+ " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0"
  "\00:1\0"
  "b\0"
- "On ?,  2? 23, 2017 at 06:00:20?? -0600, Rob Herring wrote:\n"
+ "On \345\233\233,  2\346\234\210 23, 2017 at 06:00:20\344\270\213\345\215\210 -0600, Rob Herring wrote:\n"
  "> On Tue, Feb 21, 2017 at 12:55 AM, Chunyan Zhang\n"
  "> <chunyan.zhang@spreadtrum.com> wrote:\n"
  "> > From: Orson Zhai <orson.zhai@spreadtrum.com>\n"
@@ -106,7 +117,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               CPU0: cpu at 530000 {\n"
+ "> > +               CPU0: cpu@530000 {\n"
  "> > +                       device_type = \"cpu\";\n"
  "> > +                       compatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +                       reg = <0x0 0x530000>;\n"
@@ -114,7 +125,7 @@
  "> > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               CPU1: cpu at 530001 {\n"
+ "> > +               CPU1: cpu@530001 {\n"
  "> > +                       device_type = \"cpu\";\n"
  "> > +                       compatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +                       reg = <0x0 0x530001>;\n"
@@ -122,7 +133,7 @@
  "> > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               CPU2: cpu at 530002 {\n"
+ "> > +               CPU2: cpu@530002 {\n"
  "> > +                       device_type = \"cpu\";\n"
  "> > +                       compatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +                       reg = <0x0 0x530002>;\n"
@@ -130,7 +141,7 @@
  "> > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               CPU3: cpu at 530003 {\n"
+ "> > +               CPU3: cpu@530003 {\n"
  "> > +                       device_type = \"cpu\";\n"
  "> > +                       compatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +                       reg = <0x0 0x530003>;\n"
@@ -138,7 +149,7 @@
  "> > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               CPU4: cpu at 530100 {\n"
+ "> > +               CPU4: cpu@530100 {\n"
  "> > +                       device_type = \"cpu\";\n"
  "> > +                       compatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +                       reg = <0x0 0x530100>;\n"
@@ -146,7 +157,7 @@
  "> > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               CPU5: cpu at 530101 {\n"
+ "> > +               CPU5: cpu@530101 {\n"
  "> > +                       device_type = \"cpu\";\n"
  "> > +                       compatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +                       reg = <0x0 0x530101>;\n"
@@ -154,7 +165,7 @@
  "> > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               CPU6: cpu at 530102 {\n"
+ "> > +               CPU6: cpu@530102 {\n"
  "> > +                       device_type = \"cpu\";\n"
  "> > +                       compatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +                       reg = <0x0 0x530102>;\n"
@@ -162,7 +173,7 @@
  "> > +                       cpu-idle-states = <&CORE_PD &CLUSTER_PD>;\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               CPU7: cpu at 530103 {\n"
+ "> > +               CPU7: cpu@530103 {\n"
  "> > +                       device_type = \"cpu\";\n"
  "> > +                       compatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  "> > +                       reg = <0x0 0x530103>;\n"
@@ -193,7 +204,7 @@
  "> > +               };\n"
  "> > +       };\n"
  "> > +\n"
- "> > +       gic: interrupt-controller at 12001000 {\n"
+ "> > +       gic: interrupt-controller@12001000 {\n"
  "> > +               compatible = \"arm,gic-400\";\n"
  "> > +               reg = <0 0x12001000 0 0x1000>,\n"
  "> > +                     <0 0x12002000 0 0x2000>,\n"
@@ -243,7 +254,7 @@
  "> > +       };\n"
  "> > +\n"
  "> > +       soc {\n"
- "> > +               soc_funnel: funnel at 10001000 {\n"
+ "> > +               soc_funnel: funnel@10001000 {\n"
  "> > +                       compatible = \"arm,coresight-funnel\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x10001000 0 0x1000>;\n"
  "> \n"
@@ -261,14 +272,14 @@
  "> > +                               #address-cells = <1>;\n"
  "> > +                               #size-cells = <0>;\n"
  "> > +\n"
- "> > +                               port at 0 {\n"
+ "> > +                               port@0 {\n"
  "> > +                                       reg = <0>;\n"
  "> > +                                       soc_funnel_out_port: endpoint {\n"
  "> > +                                               remote-endpoint = <&etb_in>;\n"
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 1 {\n"
+ "> > +                               port@1 {\n"
  "> > +                                       reg = <0>;\n"
  "> > +                                       soc_funnel_in_port: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -279,7 +290,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               etb at 10003000 {\n"
+ "> > +               etb@10003000 {\n"
  "> > +                       compatible = \"arm,coresight-tmc\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x10003000 0 0x1000>;\n"
  "> > +                       clocks = <&ext_26m>;\n"
@@ -293,7 +304,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               cluster0_funnel: funnel at 11001000 {\n"
+ "> > +               cluster0_funnel: funnel@11001000 {\n"
  "> > +                       compatible = \"arm,coresight-funnel\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11001000 0 0x1000>;\n"
  "> > +                       clocks = <&ext_26m>;\n"
@@ -302,7 +313,7 @@
  "> > +                               #address-cells = <1>;\n"
  "> > +                               #size-cells = <0>;\n"
  "> > +\n"
- "> > +                               port at 0 {\n"
+ "> > +                               port@0 {\n"
  "> > +                                       reg = <0>;\n"
  "> > +                                       cluster0_funnel_out_port: endpoint {\n"
  "> > +                                               remote-endpoint =\n"
@@ -310,7 +321,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 1 {\n"
+ "> > +                               port@1 {\n"
  "> > +                                       reg = <0>;\n"
  "> > +                                       cluster0_funnel_in_port0: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -318,7 +329,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 2 {\n"
+ "> > +                               port@2 {\n"
  "> > +                                       reg = <1>;\n"
  "> > +                                       cluster0_funnel_in_port1: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -326,7 +337,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 3 {\n"
+ "> > +                               port@3 {\n"
  "> > +                                       reg = <2>;\n"
  "> > +                                       cluster0_funnel_in_port2: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -334,7 +345,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 4 {\n"
+ "> > +                               port@4 {\n"
  "> > +                                       reg = <4>;\n"
  "> > +                                       cluster0_funnel_in_port3: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -344,7 +355,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               cluster1_funnel: funnel at 11002000 {\n"
+ "> > +               cluster1_funnel: funnel@11002000 {\n"
  "> > +                       compatible = \"arm,coresight-funnel\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11002000 0 0x1000>;\n"
  "> > +                       clocks = <&ext_26m>;\n"
@@ -353,7 +364,7 @@
  "> > +                               #address-cells = <1>;\n"
  "> > +                               #size-cells = <0>;\n"
  "> > +\n"
- "> > +                               port at 0 {\n"
+ "> > +                               port@0 {\n"
  "> > +                                       reg = <0>;\n"
  "> > +                                       cluster1_funnel_out_port: endpoint {\n"
  "> > +                                               remote-endpoint =\n"
@@ -361,7 +372,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 1 {\n"
+ "> > +                               port@1 {\n"
  "> > +                                       reg = <0>;\n"
  "> > +                                       cluster1_funnel_in_port0: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -369,7 +380,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 2 {\n"
+ "> > +                               port@2 {\n"
  "> > +                                       reg = <1>;\n"
  "> > +                                       cluster1_funnel_in_port1: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -377,7 +388,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 3 {\n"
+ "> > +                               port@3 {\n"
  "> > +                                       reg = <2>;\n"
  "> > +                                       cluster1_funnel_in_port2: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -385,7 +396,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 4 {\n"
+ "> > +                               port@4 {\n"
  "> > +                                       reg = <3>;\n"
  "> > +                                       cluster1_funnel_in_port3: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -395,20 +406,20 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               cluster0_etf: etf at 11003000 {\n"
+ "> > +               cluster0_etf: etf@11003000 {\n"
  "> > +                       compatible = \"arm,coresight-tmc\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11003000 0 0x1000>;\n"
  "> > +                       clocks = <&ext_26m>;\n"
  "> > +                       clock-names = \"apb_pclk\";\n"
  "> > +\n"
- "> > +                       port at 0 {\n"
+ "> > +                       port@0 {\n"
  "> > +                               cluster0_etf_out: endpoint {\n"
  "> > +                                       remote-endpoint =\n"
  "> > +                                               <&main_funnel_in_port0>;\n"
  "> > +                               };\n"
  "> > +                       };\n"
  "> > +\n"
- "> > +                       port at 1 {\n"
+ "> > +                       port@1 {\n"
  "> > +                               cluster0_etf_in: endpoint {\n"
  "> > +                                       slave-mode;\n"
  "> > +                                       remote-endpoint =\n"
@@ -417,20 +428,20 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               cluster1_etf: etf at 11004000 {\n"
+ "> > +               cluster1_etf: etf@11004000 {\n"
  "> > +                       compatible = \"arm,coresight-tmc\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11004000 0 0x1000>;\n"
  "> > +                       clocks = <&ext_26m>;\n"
  "> > +                       clock-names = \"apb_pclk\";\n"
  "> > +\n"
- "> > +                       port at 0 {\n"
+ "> > +                       port@0 {\n"
  "> > +                               cluster1_etf_out: endpoint {\n"
  "> > +                                       remote-endpoint =\n"
  "> > +                                               <&main_funnel_in_port1>;\n"
  "> > +                               };\n"
  "> > +                       };\n"
  "> > +\n"
- "> > +                       port at 1 {\n"
+ "> > +                       port@1 {\n"
  "> > +                               cluster1_etf_in: endpoint {\n"
  "> > +                                       slave-mode;\n"
  "> > +                                       remote-endpoint =\n"
@@ -439,7 +450,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               main_funnel: funnel at 11005000 {\n"
+ "> > +               main_funnel: funnel@11005000 {\n"
  "> > +                       compatible = \"arm,coresight-funnel\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11005000 0 0x1000>;\n"
  "> > +                       clocks = <&ext_26m>;\n"
@@ -449,7 +460,7 @@
  "> > +                               #address-cells = <1>;\n"
  "> > +                               #size-cells = <0>;\n"
  "> > +\n"
- "> > +                               port at 0 {\n"
+ "> > +                               port@0 {\n"
  "> > +                                       reg = <0>;\n"
  "> > +                                       main_funnel_out_port: endpoint {\n"
  "> > +                                               remote-endpoint =\n"
@@ -457,7 +468,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 1 {\n"
+ "> > +                               port@1 {\n"
  "> > +                                       reg = <0>;\n"
  "> > +                                       main_funnel_in_port0: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -466,7 +477,7 @@
  "> > +                                       };\n"
  "> > +                               };\n"
  "> > +\n"
- "> > +                               port at 2 {\n"
+ "> > +                               port@2 {\n"
  "> > +                                       reg = <1>;\n"
  "> > +                                       main_funnel_in_port1: endpoint {\n"
  "> > +                                               slave-mode;\n"
@@ -477,7 +488,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               etm at 11440000 {\n"
+ "> > +               etm@11440000 {\n"
  "> > +                       compatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11440000 0 0x1000>;\n"
  "> > +                       cpu = <&CPU0>;\n"
@@ -492,7 +503,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               etm at 11540000 {\n"
+ "> > +               etm@11540000 {\n"
  "> > +                       compatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11540000 0 0x1000>;\n"
  "> > +                       cpu = <&CPU1>;\n"
@@ -507,7 +518,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               etm at 11640000 {\n"
+ "> > +               etm@11640000 {\n"
  "> > +                       compatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11640000 0 0x1000>;\n"
  "> > +                       cpu = <&CPU2>;\n"
@@ -522,7 +533,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               etm at 11740000 {\n"
+ "> > +               etm@11740000 {\n"
  "> > +                       compatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11740000 0 0x1000>;\n"
  "> > +                       cpu = <&CPU3>;\n"
@@ -537,7 +548,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               etm at 11840000 {\n"
+ "> > +               etm@11840000 {\n"
  "> > +                       compatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11840000 0 0x1000>;\n"
  "> > +                       cpu = <&CPU4>;\n"
@@ -552,7 +563,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               etm at 11940000 {\n"
+ "> > +               etm@11940000 {\n"
  "> > +                       compatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11940000 0 0x1000>;\n"
  "> > +                       cpu = <&CPU5>;\n"
@@ -567,7 +578,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               etm at 11a40000 {\n"
+ "> > +               etm@11a40000 {\n"
  "> > +                       compatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11a40000 0 0x1000>;\n"
  "> > +                       cpu = <&CPU6>;\n"
@@ -582,7 +593,7 @@
  "> > +                       };\n"
  "> > +               };\n"
  "> > +\n"
- "> > +               etm at 11b40000 {\n"
+ "> > +               etm@11b40000 {\n"
  "> > +                       compatible = \"arm,coresight-etm4x\", \"arm,primecell\";\n"
  "> > +                       reg = <0 0x11b40000 0 0x1000>;\n"
  "> > +                       cpu = <&CPU7>;\n"
@@ -698,7 +709,7 @@
  "\n"
  "> \n"
  "> > +\n"
- "> > +                       uart0: serial at 70000000 {\n"
+ "> > +                       uart0: serial@70000000 {\n"
  "> > +                               compatible = \"sprd,sc9838-uart\",\n"
  "> > +                                            \"sprd,sc9836-uart\";\n"
  "> > +                               reg = <0x000000 0x100>;\n"
@@ -707,7 +718,7 @@
  "> > +                               status = \"disabled\";\n"
  "> > +                       };\n"
  "> > +\n"
- "> > +                       uart1: serial at 70100000 {\n"
+ "> > +                       uart1: serial@70100000 {\n"
  "> > +                               compatible = \"sprd,sc9838-uart\",\n"
  "> > +                                            \"sprd,sc9836-uart\";\n"
  "> > +                               reg = <0x100000 0x100>;\n"
@@ -716,7 +727,7 @@
  "> > +                               status = \"disabled\";\n"
  "> > +                       };\n"
  "> > +\n"
- "> > +                       uart2: serial at 70200000 {\n"
+ "> > +                       uart2: serial@70200000 {\n"
  "> > +                               compatible = \"sprd,sc9838-uart\",\n"
  "> > +                                            \"sprd,sc9836-uart\";\n"
  "> > +                               reg = <0x200000 0x100>;\n"
@@ -725,7 +736,7 @@
  "> > +                               status = \"disabled\";\n"
  "> > +                       };\n"
  "> > +\n"
- "> > +                       uart3: serial at 70300000 {\n"
+ "> > +                       uart3: serial@70300000 {\n"
  "> > +                               compatible = \"sprd,sc9838-uart\",\n"
  "> > +                                            \"sprd,sc9836-uart\";\n"
  "> > +                               reg = <0x300000 0x100>;\n"
@@ -756,6 +767,11 @@
  "> > +};\n"
  "> > --\n"
  "> > 2.7.4\n"
- > >
+ "> >\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-arm-kernel mailing list\n"
+ "linux-arm-kernel@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-64a7154e9339496d86157ba646a3e7a4eb7d0517a7c4a912cbe70004222c3c23
+eb39899d6841632e3c2faa6f2dcb7fb944b7bee54aebfb5ed6fee0cce19168e6
