diff for duplicates of <20170301165245.5f2fbfaf@free-electrons.com>

diff --git a/a/1.txt b/N1/1.txt
index 4feb51e..169b8b2 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -3,14 +3,13 @@ Stephen,
 On Wed, 21 Dec 2016 16:14:53 -0800, Stephen Boyd wrote:
 > On 12/21, Thomas Petazzoni wrote:
 > > It turns out that in the CP110 HW block present in Marvell Armada
-> > 7K/8K SoCs, gatable clock n=C2=B018 not only controls SD/MMC, but also =
-the
+> > 7K/8K SoCs, gatable clock n?18 not only controls SD/MMC, but also the
 > > GOP block. This commit updates the Device Tree binding for this piece
 > > of hardware accordingly.
-> >=20
+> > 
 > > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-> > --- =20
->=20
+> > ---  
+> 
 > Applied to clk-next
 
 Even though you said you applied it, I still don't see this patch in
@@ -23,7 +22,7 @@ been merged since quite a while.
 Thanks,
 
 Thomas
---=20
+-- 
 Thomas Petazzoni, CTO, Free Electrons
 Embedded Linux and Kernel engineering
 http://free-electrons.com
diff --git a/a/content_digest b/N1/content_digest
index 5b2b4ee..ee436f6 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,26 +1,10 @@
  "ref\01482316017-22154-1-git-send-email-thomas.petazzoni@free-electrons.com\0"
  "ref\01482316017-22154-2-git-send-email-thomas.petazzoni@free-electrons.com\0"
  "ref\020161222001453.GW8288@codeaurora.org\0"
- "From\0Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\0"
- "Subject\0Re: [PATCHv2 1/3] dt-bindings: arm: update Armada CP110 system controller binding\0"
+ "From\0thomas.petazzoni@free-electrons.com (Thomas Petazzoni)\0"
+ "Subject\0[PATCHv2 1/3] dt-bindings: arm: update Armada CP110 system controller binding\0"
  "Date\0Wed, 1 Mar 2017 16:52:45 +0100\0"
- "To\0Stephen Boyd <sboyd@codeaurora.org>\0"
- "Cc\0Michael Turquette <mturquette@baylibre.com>"
-  linux-clk@vger.kernel.org
-  Jason Cooper <jason@lakedaemon.net>
-  Andrew Lunn <andrew@lunn.ch>
-  Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-  Gregory Clement <gregory.clement@free-electrons.com>
-  devicetree@vger.kernel.org
-  Rob Herring <robh+dt@kernel.org>
-  Ian Campbell <ijc+devicetree@hellion.org.uk>
-  Pawel Moll <pawel.moll@arm.com>
-  Mark Rutland <mark.rutland@arm.com>
-  Kumar Gala <galak@codeaurora.org>
-  Nadav Haklai <nadavh@marvell.com>
-  Hanna Hawa <hannah@marvell.com>
-  Yehuda Yitschak <yehuday@marvell.com>
- " linux-arm-kernel@lists.infradead.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Stephen,\n"
@@ -28,14 +12,13 @@
  "On Wed, 21 Dec 2016 16:14:53 -0800, Stephen Boyd wrote:\n"
  "> On 12/21, Thomas Petazzoni wrote:\n"
  "> > It turns out that in the CP110 HW block present in Marvell Armada\n"
- "> > 7K/8K SoCs, gatable clock n=C2=B018 not only controls SD/MMC, but also =\n"
- "the\n"
+ "> > 7K/8K SoCs, gatable clock n?18 not only controls SD/MMC, but also the\n"
  "> > GOP block. This commit updates the Device Tree binding for this piece\n"
  "> > of hardware accordingly.\n"
- "> >=20\n"
+ "> > \n"
  "> > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\n"
- "> > --- =20\n"
- ">=20\n"
+ "> > ---  \n"
+ "> \n"
  "> Applied to clk-next\n"
  "\n"
  "Even though you said you applied it, I still don't see this patch in\n"
@@ -48,9 +31,9 @@
  "Thanks,\n"
  "\n"
  "Thomas\n"
- "--=20\n"
+ "-- \n"
  "Thomas Petazzoni, CTO, Free Electrons\n"
  "Embedded Linux and Kernel engineering\n"
  http://free-electrons.com
 
-834973ce96d4c0dfe354260da6d7b5fb8210d812a12759556ae4bd66dc1eb298
+107ca0796dd720f8037efa2861e6e9337cc875839deb3ca8c2ccf5b04ff78af2
