From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v6 1/3] drm_fourcc: Add new P010, P016 video format Date: Mon, 6 Mar 2017 20:34:34 +0200 Message-ID: <20170306183434.GV31595@intel.com> References: <1488708033-5691-1-git-send-email-ayaka@soulik.info> <1488708033-5691-2-git-send-email-ayaka@soulik.info> <20170306130609.GT31595@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id E01B26E1A1 for ; Mon, 6 Mar 2017 18:34:38 +0000 (UTC) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Ayaka Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, mchehab@kernel.org, linux-media@vger.kernel.org List-Id: dri-devel@lists.freedesktop.org T24gVHVlLCBNYXIgMDcsIDIwMTcgYXQgMDE6NTg6MjNBTSArMDgwMCwgQXlha2Egd3JvdGU6Cj4g Cj4gCj4g5b6e5oiR55qEIGlQYWQg5YKz6YCBCj4gCj4gPiBWaWxsZSBTeXJqw6Rsw6QgPHZpbGxl LnN5cmphbGFAbGludXguaW50ZWwuY29tPiDmlrwgMjAxN+W5tDPmnIg25pelIOS4i+WNiDk6MDYg 5a+r6YGT77yaCj4gPiAKPiA+PiBPbiBTdW4sIE1hciAwNSwgMjAxNyBhdCAwNjowMDozMVBNICsw ODAwLCBSYW5keSBMaSB3cm90ZToKPiA+PiBQMDEwIGlzIGEgcGxhbmFyIDQ6MjowIFlVViB3aXRo IGludGVybGVhdmVkIFVWIHBsYW5lLCAxMCBiaXRzCj4gPj4gcGVyIGNoYW5uZWwgdmlkZW8gZm9y bWF0Lgo+ID4+IAo+ID4+IFAwMTYgaXMgYSBwbGFuYXIgNDoyOjAgWVVWIHdpdGggaW50ZXJsZWF2 ZWQgVVYgcGxhbmUsIDE2IGJpdHMKPiA+PiBwZXIgY2hhbm5lbCB2aWRlbyBmb3JtYXQuCj4gPj4g Cj4gPj4gVjM6IEFkZGVkIFAwMTIgYW5kIGZpeGVkIGNwcCBmb3IgUDAxMAo+ID4+IFY0OiBmb3Jt YXQgZGVmaW5pdGlvbiByZWZpbmVkIHBlciByZXZpZXcKPiA+PiBWNTogRm9ybWF0IGNvbW1lbnQg YmxvY2sgZm9yIGVhY2ggbmV3IHBpeGVsIGZvcm1hdAo+ID4+IFY2OiByZXZlcnNlZCBDYi9DciBv cmRlciBpbiBjb21tZW50cwo+ID4+IHY3OiByZXZlcnNlZCBDYi9DciBvcmRlciBpbiBjb21tZW50 cyBvZiBoZWFkZXIgZmlsZXMsIHJlbW92ZQo+ID4+IHRoZSB3cm9uZyBwYXJ0IG9mIGNvbW1pdCBt ZXNzYWdlLgo+ID4gCj4gPiBXaGF0PyBXaHk/IFlvdSBqdXN0IHVuZGlkIHdoYXQgQ2xpbnQgZGlk IGluIHY2Lgo+IEhlIG1pc3NlZCBhIGZpbGUgYWxzbyBrZWVwaW5nIHRoZSB3cm9uZyBkZXNjcmlw dGlvbiBvZiByb2NrY2hpcC4KCkkgZG9uJ3QgZm9sbG93LiBXaG8gbWlzc2VkIHdoYXQgZXhhY3Rs eT8KCj4gPiAKPiA+PiAKPiA+PiBDYzogRGFuaWVsIFN0b25lIDxkYW5pZWxAZm9vaXNoYmFyLm9y Zz4KPiA+PiBDYzogVmlsbGUgU3lyasOkbMOkIDx2aWxsZS5zeXJqYWxhQGxpbnV4LmludGVsLmNv bT4KPiA+PiAKPiA+PiBTaWduZWQtb2ZmLWJ5OiBSYW5keSBMaSA8YXlha2FAc291bGlrLmluZm8+ Cj4gPj4gU2lnbmVkLW9mZi1ieTogQ2xpbnQgVGF5bG9yIDxjbGludG9uLmEudGF5bG9yQGludGVs LmNvbT4KPiA+PiAtLS0KPiA+PiBkcml2ZXJzL2dwdS9kcm0vZHJtX2ZvdXJjYy5jICB8ICAzICsr Kwo+ID4+IGluY2x1ZGUvdWFwaS9kcm0vZHJtX2ZvdXJjYy5oIHwgMjEgKysrKysrKysrKysrKysr KysrKysrCj4gPj4gMiBmaWxlcyBjaGFuZ2VkLCAyNCBpbnNlcnRpb25zKCspCj4gPj4gCj4gPj4g ZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9kcm1fZm91cmNjLmMgYi9kcml2ZXJzL2dwdS9k cm0vZHJtX2ZvdXJjYy5jCj4gPj4gaW5kZXggOTBkMmNjOC4uM2UwZmQ1OCAxMDA2NDQKPiA+PiAt LS0gYS9kcml2ZXJzL2dwdS9kcm0vZHJtX2ZvdXJjYy5jCj4gPj4gKysrIGIvZHJpdmVycy9ncHUv ZHJtL2RybV9mb3VyY2MuYwo+ID4+IEBAIC0xNjUsNiArMTY1LDkgQEAgY29uc3Qgc3RydWN0IGRy bV9mb3JtYXRfaW5mbyAqX19kcm1fZm9ybWF0X2luZm8odTMyIGZvcm1hdCkKPiA+PiAgICAgICAg eyAuZm9ybWF0ID0gRFJNX0ZPUk1BVF9VWVZZLCAgICAgICAgLmRlcHRoID0gMCwgIC5udW1fcGxh bmVzID0gMSwgLmNwcCA9IHsgMiwgMCwgMCB9LCAuaHN1YiA9IDIsIC52c3ViID0gMSB9LAo+ID4+ ICAgICAgICB7IC5mb3JtYXQgPSBEUk1fRk9STUFUX1ZZVVksICAgICAgICAuZGVwdGggPSAwLCAg Lm51bV9wbGFuZXMgPSAxLCAuY3BwID0geyAyLCAwLCAwIH0sIC5oc3ViID0gMiwgLnZzdWIgPSAx IH0sCj4gPj4gICAgICAgIHsgLmZvcm1hdCA9IERSTV9GT1JNQVRfQVlVViwgICAgICAgIC5kZXB0 aCA9IDAsICAubnVtX3BsYW5lcyA9IDEsIC5jcHAgPSB7IDQsIDAsIDAgfSwgLmhzdWIgPSAxLCAu dnN1YiA9IDEgfSwKPiA+PiArICAgICAgICB7IC5mb3JtYXQgPSBEUk1fRk9STUFUX1AwMTAsICAg ICAgICAuZGVwdGggPSAwLCAgLm51bV9wbGFuZXMgPSAyLCAuY3BwID0geyAyLCA0LCAwIH0sIC5o c3ViID0gMiwgLnZzdWIgPSAyIH0sCj4gPj4gKyAgICAgICAgeyAuZm9ybWF0ID0gRFJNX0ZPUk1B VF9QMDEyLCAgICAgICAgLmRlcHRoID0gMCwgIC5udW1fcGxhbmVzID0gMiwgLmNwcCA9IHsgMiwg NCwgMCB9LCAuaHN1YiA9IDIsIC52c3ViID0gMiB9LAo+ID4+ICsgICAgICAgIHsgLmZvcm1hdCA9 IERSTV9GT1JNQVRfUDAxNiwgICAgICAgIC5kZXB0aCA9IDAsICAubnVtX3BsYW5lcyA9IDIsIC5j cHAgPSB7IDIsIDQsIDAgfSwgLmhzdWIgPSAyLCAudnN1YiA9IDIgfSwKPiA+PiAgICB9Owo+ID4+ IAo+ID4+ICAgIHVuc2lnbmVkIGludCBpOwo+ID4+IGRpZmYgLS1naXQgYS9pbmNsdWRlL3VhcGkv ZHJtL2RybV9mb3VyY2MuaCBiL2luY2x1ZGUvdWFwaS9kcm0vZHJtX2ZvdXJjYy5oCj4gPj4gaW5k ZXggZWYyMGFiYi4uMzA2Zjk3OSAxMDA2NDQKPiA+PiAtLS0gYS9pbmNsdWRlL3VhcGkvZHJtL2Ry bV9mb3VyY2MuaAo+ID4+ICsrKyBiL2luY2x1ZGUvdWFwaS9kcm0vZHJtX2ZvdXJjYy5oCj4gPj4g QEAgLTEyOCw2ICsxMjgsMjcgQEAgZXh0ZXJuICJDIiB7Cj4gPj4gI2RlZmluZSBEUk1fRk9STUFU X05WNDIgICAgICAgIGZvdXJjY19jb2RlKCdOJywgJ1YnLCAnNCcsICcyJykgLyogbm9uLXN1YnNh bXBsZWQgQ2I6Q3IgcGxhbmUgKi8KPiA+PiAKPiA+PiAvKgo+ID4+ICsgKiAyIHBsYW5lIFlDYkNy IE1TQiBhbGlnbmVkCj4gPj4gKyAqIGluZGV4IDAgPSBZIHBsYW5lLCBbMTU6MF0gWTp4IFsxMDo2 XSBsaXR0bGUgZW5kaWFuCj4gPj4gKyAqIGluZGV4IDEgPSBDYjpDciBwbGFuZSwgWzMxOjBdIENi Ong6Q3I6eCBbMTA6NjoxMDo2XSBsaXR0bGUgZW5kaWFuCj4gPj4gKyAqLwo+ID4+ICsjZGVmaW5l IERSTV9GT1JNQVRfUDAxMCAgICAgICAgZm91cmNjX2NvZGUoJ1AnLCAnMCcsICcxJywgJzAnKSAv KiAyeDIgc3Vic2FtcGxlZCBDYjpDciBwbGFuZSAxMCBiaXRzIHBlciBjaGFubmVsICovCj4gPj4g Kwo+ID4+ICsvKgo+ID4+ICsgKiAyIHBsYW5lIFlDYkNyIE1TQiBhbGlnbmVkCj4gPj4gKyAqIGlu ZGV4IDAgPSBZIHBsYW5lLCBbMTU6MF0gWTp4IFsxMjo0XSBsaXR0bGUgZW5kaWFuCj4gPj4gKyAq IGluZGV4IDEgPSBDYjpDciBwbGFuZSwgWzMxOjBdIENiOng6Q3I6eCBbMTI6NDoxMjo0XSBsaXR0 bGUgZW5kaWFuCj4gPj4gKyAqLwo+ID4+ICsjZGVmaW5lIERSTV9GT1JNQVRfUDAxMiAgICAgICAg Zm91cmNjX2NvZGUoJ1AnLCAnMCcsICcxJywgJzInKSAvKiAyeDIgc3Vic2FtcGxlZCBDYjpDciBw bGFuZSAxMiBiaXRzIHBlciBjaGFubmVsICovCj4gPj4gKwo+ID4+ICsvKgo+ID4+ICsgKiAyIHBs YW5lIFlDYkNyIE1TQiBhbGlnbmVkCj4gPj4gKyAqIGluZGV4IDAgPSBZIHBsYW5lLCBbMTU6MF0g WSBsaXR0bGUgZW5kaWFuCj4gPj4gKyAqIGluZGV4IDEgPSBDYjpDciBwbGFuZSwgWzMxOjBdIENi OkNyIFsxNjoxNl0gbGl0dGxlIGVuZGlhbgo+ID4+ICsgKi8KPiA+PiArI2RlZmluZSBEUk1fRk9S TUFUX1AwMTYgICAgICAgIGZvdXJjY19jb2RlKCdQJywgJzAnLCAnMScsICc2JykgLyogMngyIHN1 YnNhbXBsZWQgQ2I6Q3IgcGxhbmUgMTYgYml0cyBwZXIgY2hhbm5lbCAqLwo+ID4+ICsKPiA+PiAr LyoKPiA+PiAgKiAzIHBsYW5lIFlDYkNyCj4gPj4gICogaW5kZXggMDogWSBwbGFuZSwgWzc6MF0g WQo+ID4+ICAqIGluZGV4IDE6IENiIHBsYW5lLCBbNzowXSBDYgo+ID4+IC0tIAo+ID4+IDIuNy40 Cj4gPiAKPiA+IC0tIAo+ID4gVmlsbGUgU3lyasOkbMOkCj4gPiBJbnRlbCBPVEMKCi0tIApWaWxs ZSBTeXJqw6Rsw6QKSW50ZWwgT1RDCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVk ZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZv L2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mga04.intel.com ([192.55.52.120]:2783 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932273AbdCFSrE (ORCPT ); Mon, 6 Mar 2017 13:47:04 -0500 Date: Mon, 6 Mar 2017 20:34:34 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Ayaka Cc: dri-devel@lists.freedesktop.org, clinton.a.taylor@intel.com, daniel@fooishbar.org, linux-media@vger.kernel.org, mchehab@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 1/3] drm_fourcc: Add new P010, P016 video format Message-ID: <20170306183434.GV31595@intel.com> References: <1488708033-5691-1-git-send-email-ayaka@soulik.info> <1488708033-5691-2-git-send-email-ayaka@soulik.info> <20170306130609.GT31595@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Sender: linux-media-owner@vger.kernel.org List-ID: On Tue, Mar 07, 2017 at 01:58:23AM +0800, Ayaka wrote: > > > 從我的 iPad 傳送 > > > Ville Syrjälä 於 2017年3月6日 下午9:06 寫道： > > > >> On Sun, Mar 05, 2017 at 06:00:31PM +0800, Randy Li wrote: > >> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits > >> per channel video format. > >> > >> P016 is a planar 4:2:0 YUV with interleaved UV plane, 16 bits > >> per channel video format. > >> > >> V3: Added P012 and fixed cpp for P010 > >> V4: format definition refined per review > >> V5: Format comment block for each new pixel format > >> V6: reversed Cb/Cr order in comments > >> v7: reversed Cb/Cr order in comments of header files, remove > >> the wrong part of commit message. > > > > What? Why? You just undid what Clint did in v6. > He missed a file also keeping the wrong description of rockchip. I don't follow. Who missed what exactly? > > > >> > >> Cc: Daniel Stone > >> Cc: Ville Syrjälä > >> > >> Signed-off-by: Randy Li > >> Signed-off-by: Clint Taylor > >> --- > >> drivers/gpu/drm/drm_fourcc.c | 3 +++ > >> include/uapi/drm/drm_fourcc.h | 21 +++++++++++++++++++++ > >> 2 files changed, 24 insertions(+) > >> > >> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c > >> index 90d2cc8..3e0fd58 100644 > >> --- a/drivers/gpu/drm/drm_fourcc.c > >> +++ b/drivers/gpu/drm/drm_fourcc.c > >> @@ -165,6 +165,9 @@ const struct drm_format_info *__drm_format_info(u32 format) > >> { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, > >> { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1 }, > >> { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 }, > >> + { .format = DRM_FORMAT_P010, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2 }, > >> + { .format = DRM_FORMAT_P012, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2 }, > >> + { .format = DRM_FORMAT_P016, .depth = 0, .num_planes = 2, .cpp = { 2, 4, 0 }, .hsub = 2, .vsub = 2 }, > >> }; > >> > >> unsigned int i; > >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > >> index ef20abb..306f979 100644 > >> --- a/include/uapi/drm/drm_fourcc.h > >> +++ b/include/uapi/drm/drm_fourcc.h > >> @@ -128,6 +128,27 @@ extern "C" { > >> #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ > >> > >> /* > >> + * 2 plane YCbCr MSB aligned > >> + * index 0 = Y plane, [15:0] Y:x [10:6] little endian > >> + * index 1 = Cb:Cr plane, [31:0] Cb:x:Cr:x [10:6:10:6] little endian > >> + */ > >> +#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0') /* 2x2 subsampled Cb:Cr plane 10 bits per channel */ > >> + > >> +/* > >> + * 2 plane YCbCr MSB aligned > >> + * index 0 = Y plane, [15:0] Y:x [12:4] little endian > >> + * index 1 = Cb:Cr plane, [31:0] Cb:x:Cr:x [12:4:12:4] little endian > >> + */ > >> +#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2') /* 2x2 subsampled Cb:Cr plane 12 bits per channel */ > >> + > >> +/* > >> + * 2 plane YCbCr MSB aligned > >> + * index 0 = Y plane, [15:0] Y little endian > >> + * index 1 = Cb:Cr plane, [31:0] Cb:Cr [16:16] little endian > >> + */ > >> +#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cb:Cr plane 16 bits per channel */ > >> + > >> +/* > >> * 3 plane YCbCr > >> * index 0: Y plane, [7:0] Y > >> * index 1: Cb plane, [7:0] Cb > >> -- > >> 2.7.4 > > > > -- > > Ville Syrjälä > > Intel OTC -- Ville Syrjälä Intel OTC