diff for duplicates of <20170309031049.GA122422@google.com> diff --git a/a/1.txt b/N1/1.txt index ef759bd..a49f9dd 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,14 +1,14 @@ Hi, On Thu, Mar 09, 2017 at 02:02:54AM +0100, Heiko Stuebner wrote: -> Am Mittwoch, 8. März 2017, 16:39:23 CET schrieb Brian Norris: +> Am Mittwoch, 8. M?rz 2017, 16:39:23 CET schrieb Brian Norris: > > On Fri, Feb 10, 2017 at 03:44:13PM +0800, Chris Zhong wrote: > > > There are 2 Type-c PHYs in RK3399, but only one DP controller. Hence > > > only one PHY can connect to DP controller at one time, the other should > > > be disconnected. The GRF_SOC_CON26 register has a switch bit to do it, > > > set this bit means enable PHY 1, clear this bit means enable PHY 0. > > > -> > > Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> +> > > Signed-off-by: Chris Zhong <zyw@rock-chips.com> > > > --- > > > > > > drivers/phy/phy-rockchip-typec.c | 9 +++++++++ diff --git a/a/content_digest b/N1/content_digest index a65266c..e6b589f 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,33 +2,23 @@ "ref\01486712654-15431-4-git-send-email-zyw@rock-chips.com\0" "ref\020170309003921.GA101174@google.com\0" "ref\011032198.PxydffNNDT@diego\0" - "From\0Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>\0" - "Subject\0Re: [PATCH 3/4] phy: rockchip-typec: support DP phy switch\0" + "From\0briannorris@chromium.org (Brian Norris)\0" + "Subject\0[PATCH 3/4] phy: rockchip-typec: support DP phy switch\0" "Date\0Wed, 8 Mar 2017 19:10:50 -0800\0" - "To\0Heiko St\303\274bner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0" - "Cc\0robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org - kishon-l0cyMroinI0@public.gmane.org - linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org - Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> - groeck-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi,\n" "\n" "On Thu, Mar 09, 2017 at 02:02:54AM +0100, Heiko Stuebner wrote:\n" - "> Am Mittwoch, 8. M\303\244rz 2017, 16:39:23 CET schrieb Brian Norris:\n" + "> Am Mittwoch, 8. M?rz 2017, 16:39:23 CET schrieb Brian Norris:\n" "> > On Fri, Feb 10, 2017 at 03:44:13PM +0800, Chris Zhong wrote:\n" "> > > There are 2 Type-c PHYs in RK3399, but only one DP controller. Hence\n" "> > > only one PHY can connect to DP controller at one time, the other should\n" "> > > be disconnected. The GRF_SOC_CON26 register has a switch bit to do it,\n" "> > > set this bit means enable PHY 1, clear this bit means enable PHY 0.\n" "> > > \n" - "> > > Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" + "> > > Signed-off-by: Chris Zhong <zyw@rock-chips.com>\n" "> > > ---\n" "> > > \n" "> > > drivers/phy/phy-rockchip-typec.c | 9 +++++++++\n" @@ -79,4 +69,4 @@ "\n" Brian -c8c620d6e2f4b55688575d2762433722b1a6364d5d9c4d99279e5dc9d5b2c384 +365dff9fc800918e2ddcb238025b8ae500c69a8e3c5febade9c41be0babea15b
diff --git a/a/1.txt b/N2/1.txt index ef759bd..c358804 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -8,7 +8,7 @@ On Thu, Mar 09, 2017 at 02:02:54AM +0100, Heiko Stuebner wrote: > > > be disconnected. The GRF_SOC_CON26 register has a switch bit to do it, > > > set this bit means enable PHY 1, clear this bit means enable PHY 0. > > > -> > > Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> +> > > Signed-off-by: Chris Zhong <zyw@rock-chips.com> > > > --- > > > > > > drivers/phy/phy-rockchip-typec.c | 9 +++++++++ diff --git a/a/content_digest b/N2/content_digest index a65266c..a574cc4 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,20 +2,20 @@ "ref\01486712654-15431-4-git-send-email-zyw@rock-chips.com\0" "ref\020170309003921.GA101174@google.com\0" "ref\011032198.PxydffNNDT@diego\0" - "From\0Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>\0" + "From\0Brian Norris <briannorris@chromium.org>\0" "Subject\0Re: [PATCH 3/4] phy: rockchip-typec: support DP phy switch\0" "Date\0Wed, 8 Mar 2017 19:10:50 -0800\0" - "To\0Heiko St\303\274bner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0" - "Cc\0robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org - kishon-l0cyMroinI0@public.gmane.org - linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org - Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> - groeck-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org\0" + "To\0Heiko St\303\274bner <heiko@sntech.de>\0" + "Cc\0Chris Zhong <zyw@rock-chips.com>" + dri-devel@lists.freedesktop.org + kishon@ti.com + robh@kernel.org + linux-rockchip@lists.infradead.org + linux-kernel@vger.kernel.org + seanpaul@chromium.org + groeck@chromium.org + linux-arm-kernel@lists.infradead.org + " mark.yao@rock-chips.com\0" "\00:1\0" "b\0" "Hi,\n" @@ -28,7 +28,7 @@ "> > > be disconnected. The GRF_SOC_CON26 register has a switch bit to do it,\n" "> > > set this bit means enable PHY 1, clear this bit means enable PHY 0.\n" "> > > \n" - "> > > Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" + "> > > Signed-off-by: Chris Zhong <zyw@rock-chips.com>\n" "> > > ---\n" "> > > \n" "> > > drivers/phy/phy-rockchip-typec.c | 9 +++++++++\n" @@ -79,4 +79,4 @@ "\n" Brian -c8c620d6e2f4b55688575d2762433722b1a6364d5d9c4d99279e5dc9d5b2c384 +8fd6704c3a6295a56d238f79cf394df8c92b5291d57ca61b981cec075c55e023
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