From: Christoffer Dall <cdall@linaro.org>
To: Andrew Jones <drjones@redhat.com>
Cc: marc.zyngier@arm.com, ashoks@broadcom.com, imammedo@redhat.com,
kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH 2/5] KVM: arm/arm64: replace vcpu->arch.pause with a vcpu-request
Date: Mon, 13 Mar 2017 11:30:05 +0100 [thread overview]
Message-ID: <20170313103005.GA1277@cbox> (raw)
In-Reply-To: <20170308144411.tobywqs7qh4g4n2y@hawk.localdomain>
On Wed, Mar 08, 2017 at 03:44:11PM +0100, Andrew Jones wrote:
> On Wed, Mar 08, 2017 at 06:33:12AM -0800, Christoffer Dall wrote:
> > > static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu)
> > > @@ -621,7 +617,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
> > >
> > > update_vttbr(vcpu->kvm);
> > >
> > > - if (vcpu->arch.power_off || vcpu->arch.pause)
> > > + if (vcpu->arch.power_off || __kvm_request_test(KVM_REQ_VCPU_PAUSE, vcpu))
> > > vcpu_sleep(vcpu);
> > >
> > > /*
> > > @@ -644,8 +640,13 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
> > > run->exit_reason = KVM_EXIT_INTR;
> > > }
> > >
> > > + vcpu->mode = IN_GUEST_MODE;
> > > + smp_mb(); /* ensure vcpu->mode is visible to kvm_vcpu_kick */
> >
> > I think this comment is misleading, because this smp_mb() is really
> > about ensuring that with respect to other CPUs, the write to vcpu->mode
> > is observable before the read of kvm_request_pending below, and the
> > corresponding other barrier is the barrier implied in cmpxchg used by
> > kvm_vcpu_exiting_guest_mode, which gets called by kvm_vcpu_kick(), which
> > is called after __kvm_set_request.
>
> Agreed
>
Just an adjustment to our conclusion from last week:
Will Deacon clarified that the cmpxchg doesn't have barrier semantics if
the cmpxchg operation fails. My brain hurts trying to work out if we're
still safe in that case. Thoughts?
Thanks,
-Christoffer
next prev parent reply other threads:[~2017-03-13 10:28 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-27 17:54 [PATCH 0/5] KVM: arm/arm64: fix some races and allow userspace to set MPIDR Andrew Jones
2017-02-27 17:55 ` [PATCH 1/5] KVM: arm/arm64: prepare to use vcpu requests Andrew Jones
2017-03-08 13:21 ` Christoffer Dall
2017-02-27 17:55 ` [PATCH 2/5] KVM: arm/arm64: replace vcpu->arch.pause with a vcpu-request Andrew Jones
2017-03-08 14:33 ` Christoffer Dall
2017-03-08 14:44 ` Andrew Jones
2017-03-13 10:30 ` Christoffer Dall [this message]
2017-03-13 17:27 ` Andrew Jones
2017-03-13 18:22 ` Christoffer Dall
2017-02-27 17:55 ` [PATCH 3/5] KVM: arm/arm64: replace vcpu->arch.power_off " Andrew Jones
2017-02-27 17:55 ` [PATCH 4/5] KVM: arm/arm64: fix race in kvm_psci_vcpu_on Andrew Jones
2017-02-27 17:55 ` [PATCH 5/5] KVM: arm/arm64: allow userspace to set MPIDR Andrew Jones
2017-03-08 13:19 ` Christoffer Dall
2017-03-08 14:27 ` Peter Maydell
2017-03-08 17:21 ` Christoffer Dall
2017-03-08 20:48 ` Peter Maydell
2017-03-08 17:27 ` [PATCH 0/5] KVM: arm/arm64: fix some races and " Christoffer Dall
2017-03-08 17:53 ` Andrew Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170313103005.GA1277@cbox \
--to=cdall@linaro.org \
--cc=ashoks@broadcom.com \
--cc=drjones@redhat.com \
--cc=imammedo@redhat.com \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=marc.zyngier@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.