From: Thierry Reding <thierry.reding@gmail.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Alexandre Courbot <gnurou@gmail.com>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: tegra: fix disable unused for clocks sharing enable bit
Date: Mon, 20 Mar 2017 14:27:46 +0100 [thread overview]
Message-ID: <20170320132746.GK22463@ulmo.ba.sec> (raw)
In-Reply-To: <1489587055-23722-1-git-send-email-pdeschrijver@nvidia.com>
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On Wed, Mar 15, 2017 at 04:10:54PM +0200, Peter De Schrijver wrote:
> In case 2 clocks share an enable bit and one of them is enabled by a driver
> and the other one is not, CCF will think it's enabled because it will only
> look at the hw state. Therefor it will disable the clock and thus also
> disable the other clock which was enabled. Solve this by reading the
> initial state of the enable bit and incrementing the refcount if it's set.
>
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
> drivers/clk/tegra/clk-periph-gate.c | 3 +++
> 1 file changed, 3 insertions(+)
I think you had already sent a version of this patch a couple of weeks
ago. I've applied the first version since I couldn't spot any delta
between them.
Thierry
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next prev parent reply other threads:[~2017-03-20 13:27 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-15 14:10 [PATCH] clk: tegra: fix disable unused for clocks sharing enable bit Peter De Schrijver
2017-03-15 14:10 ` Peter De Schrijver
2017-03-20 13:27 ` Thierry Reding [this message]
2017-03-20 14:29 ` Peter De Schrijver
2017-03-20 14:29 ` Peter De Schrijver
-- strict thread matches above, loose matches on Subject: below --
2017-03-02 13:22 Peter De Schrijver
2017-03-02 13:22 ` Peter De Schrijver
2017-03-20 13:15 ` Thierry Reding
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