diff for duplicates of <20170324015606.GC30608@dragon>

diff --git a/a/1.txt b/N1/1.txt
index 880c10e..0edda55 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,7 +1,7 @@
-On Wed, Mar 22, 2017 at 02:29:39PM +0200, Horia Geantă wrote:
+On Wed, Mar 22, 2017 at 02:29:39PM +0200, Horia Geant? wrote:
 > LS1012A has a SEC v5.4 security engine.
 > 
-> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
+> Signed-off-by: Horia Geant? <horia.geanta@nxp.com>
 > ---
 >  arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts |  9 +++
 >  arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts  |  9 +++
@@ -91,7 +91,7 @@ them for all three fsl-ls1012a based boards.
 >  			big-endian;
 >  		};
 >  
-> +		crypto: crypto@1700000 {
+> +		crypto: crypto at 1700000 {
 > +			compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
 > +				     "fsl,sec-v4.0";
 > +			fsl,sec-era = <8>;
@@ -101,7 +101,7 @@ them for all three fsl-ls1012a based boards.
 > +			reg = <0x00 0x1700000 0x0 0x100000>;
 > +			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 > +
-> +			sec_jr0: jr@10000 {
+> +			sec_jr0: jr at 10000 {
 > +				compatible = "fsl,sec-v5.4-job-ring",
 > +					     "fsl,sec-v5.0-job-ring",
 > +					     "fsl,sec-v4.0-job-ring";
@@ -109,7 +109,7 @@ them for all three fsl-ls1012a based boards.
 > +				interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 > +			};
 > +
-> +			sec_jr1: jr@20000 {
+> +			sec_jr1: jr at 20000 {
 > +				compatible = "fsl,sec-v5.4-job-ring",
 > +					     "fsl,sec-v5.0-job-ring",
 > +					     "fsl,sec-v4.0-job-ring";
@@ -117,7 +117,7 @@ them for all three fsl-ls1012a based boards.
 > +				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 > +			};
 > +
-> +			sec_jr2: jr@30000 {
+> +			sec_jr2: jr at 30000 {
 > +				compatible = "fsl,sec-v5.4-job-ring",
 > +					     "fsl,sec-v5.0-job-ring",
 > +					     "fsl,sec-v4.0-job-ring";
@@ -125,7 +125,7 @@ them for all three fsl-ls1012a based boards.
 > +				interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 > +			};
 > +
-> +			sec_jr3: jr@40000 {
+> +			sec_jr3: jr at 40000 {
 > +				compatible = "fsl,sec-v5.4-job-ring",
 > +					     "fsl,sec-v5.0-job-ring",
 > +					     "fsl,sec-v4.0-job-ring";
@@ -133,7 +133,7 @@ them for all three fsl-ls1012a based boards.
 > +				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 > +			};
 > +
-> +			rtic@60000 {
+> +			rtic at 60000 {
 > +				compatible = "fsl,sec-v5.4-rtic",
 > +					     "fsl,sec-v5.0-rtic",
 > +					     "fsl,sec-v4.0-rtic";
@@ -142,28 +142,28 @@ them for all three fsl-ls1012a based boards.
 > +				reg = <0x60000 0x100 0x60e00 0x18>;
 > +				ranges = <0x0 0x60100 0x500>;
 > +
-> +				rtic_a: rtic-a@0 {
+> +				rtic_a: rtic-a at 0 {
 > +					compatible = "fsl,sec-v5.4-rtic-memory",
 > +						     "fsl,sec-v5.0-rtic-memory",
 > +						     "fsl,sec-v4.0-rtic-memory";
 > +					reg = <0x00 0x20 0x100 0x100>;
 > +				};
 > +
-> +				rtic_b: rtic-b@20 {
+> +				rtic_b: rtic-b at 20 {
 > +					compatible = "fsl,sec-v5.4-rtic-memory",
 > +						     "fsl,sec-v5.0-rtic-memory",
 > +						     "fsl,sec-v4.0-rtic-memory";
 > +					reg = <0x20 0x20 0x200 0x100>;
 > +				};
 > +
-> +				rtic_c: rtic-c@40 {
+> +				rtic_c: rtic-c at 40 {
 > +					compatible = "fsl,sec-v5.4-rtic-memory",
 > +						     "fsl,sec-v5.0-rtic-memory",
 > +						     "fsl,sec-v4.0-rtic-memory";
 > +					reg = <0x40 0x20 0x300 0x100>;
 > +				};
 > +
-> +				rtic_d: rtic-d@60 {
+> +				rtic_d: rtic-d at 60 {
 > +					compatible = "fsl,sec-v5.4-rtic-memory",
 > +						     "fsl,sec-v5.0-rtic-memory",
 > +						     "fsl,sec-v4.0-rtic-memory";
@@ -172,7 +172,7 @@ them for all three fsl-ls1012a based boards.
 > +			};
 > +		};
 > +
-> +		sec_mon: sec_mon@1e90000 {
+> +		sec_mon: sec_mon at 1e90000 {
 
 Hyphen is more preferred to be used in node name than underscore.
 
@@ -185,7 +185,7 @@ Shawn
 > +				     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 > +		};
 > +
->  		dcfg: dcfg@1ee0000 {
+>  		dcfg: dcfg at 1ee0000 {
 >  			compatible = "fsl,ls1012a-dcfg",
 >  				     "syscon";
 > -- 
@@ -194,5 +194,5 @@ Shawn
 > 
 > _______________________________________________
 > linux-arm-kernel mailing list
-> linux-arm-kernel@lists.infradead.org
+> linux-arm-kernel at lists.infradead.org
 > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 4dde905..36170d6 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,26 +1,14 @@
  "ref\020170322122939.22117-1-horia.geanta@nxp.com\0"
- "From\0Shawn Guo <shawnguo@kernel.org>\0"
- "Subject\0Re: [PATCH] arm64: dts: ls1012a: add crypto node\0"
+ "From\0shawnguo@kernel.org (Shawn Guo)\0"
+ "Subject\0[PATCH] arm64: dts: ls1012a: add crypto node\0"
  "Date\0Fri, 24 Mar 2017 09:56:08 +0800\0"
- "To\0Horia Geant\304\203 <horia.geanta@nxp.com>\0"
- "Cc\0Rob Herring <robh+dt@kernel.org>"
-  Mark Rutland <mark.rutland@arm.com>
-  devicetree@vger.kernel.org
-  Herbert Xu <herbert@gondor.apana.org.au>
-  Harninder Rai <harninder.rai@nxp.com>
-  Catalin Marinas <catalin.marinas@arm.com>
-  Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
-  Will Deacon <will.deacon@arm.com>
-  Dan Douglass <dan.douglass@nxp.com>
-  linux-crypto@vger.kernel.org
-  David S. Miller <davem@davemloft.net>
- " linux-arm-kernel@lists.infradead.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
- "On Wed, Mar 22, 2017 at 02:29:39PM +0200, Horia Geant\304\203 wrote:\n"
+ "On Wed, Mar 22, 2017 at 02:29:39PM +0200, Horia Geant? wrote:\n"
  "> LS1012A has a SEC v5.4 security engine.\n"
  "> \n"
- "> Signed-off-by: Horia Geant\304\203 <horia.geanta@nxp.com>\n"
+ "> Signed-off-by: Horia Geant? <horia.geanta@nxp.com>\n"
  "> ---\n"
  ">  arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts |  9 +++\n"
  ">  arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts  |  9 +++\n"
@@ -110,7 +98,7 @@
  ">  \t\t\tbig-endian;\n"
  ">  \t\t};\n"
  ">  \n"
- "> +\t\tcrypto: crypto@1700000 {\n"
+ "> +\t\tcrypto: crypto at 1700000 {\n"
  "> +\t\t\tcompatible = \"fsl,sec-v5.4\", \"fsl,sec-v5.0\",\n"
  "> +\t\t\t\t     \"fsl,sec-v4.0\";\n"
  "> +\t\t\tfsl,sec-era = <8>;\n"
@@ -120,7 +108,7 @@
  "> +\t\t\treg = <0x00 0x1700000 0x0 0x100000>;\n"
  "> +\t\t\tinterrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\n"
- "> +\t\t\tsec_jr0: jr@10000 {\n"
+ "> +\t\t\tsec_jr0: jr at 10000 {\n"
  "> +\t\t\t\tcompatible = \"fsl,sec-v5.4-job-ring\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v5.0-job-ring\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v4.0-job-ring\";\n"
@@ -128,7 +116,7 @@
  "> +\t\t\t\tinterrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tsec_jr1: jr@20000 {\n"
+ "> +\t\t\tsec_jr1: jr at 20000 {\n"
  "> +\t\t\t\tcompatible = \"fsl,sec-v5.4-job-ring\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v5.0-job-ring\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v4.0-job-ring\";\n"
@@ -136,7 +124,7 @@
  "> +\t\t\t\tinterrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tsec_jr2: jr@30000 {\n"
+ "> +\t\t\tsec_jr2: jr at 30000 {\n"
  "> +\t\t\t\tcompatible = \"fsl,sec-v5.4-job-ring\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v5.0-job-ring\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v4.0-job-ring\";\n"
@@ -144,7 +132,7 @@
  "> +\t\t\t\tinterrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tsec_jr3: jr@40000 {\n"
+ "> +\t\t\tsec_jr3: jr at 40000 {\n"
  "> +\t\t\t\tcompatible = \"fsl,sec-v5.4-job-ring\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v5.0-job-ring\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v4.0-job-ring\";\n"
@@ -152,7 +140,7 @@
  "> +\t\t\t\tinterrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\trtic@60000 {\n"
+ "> +\t\t\trtic at 60000 {\n"
  "> +\t\t\t\tcompatible = \"fsl,sec-v5.4-rtic\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v5.0-rtic\",\n"
  "> +\t\t\t\t\t     \"fsl,sec-v4.0-rtic\";\n"
@@ -161,28 +149,28 @@
  "> +\t\t\t\treg = <0x60000 0x100 0x60e00 0x18>;\n"
  "> +\t\t\t\tranges = <0x0 0x60100 0x500>;\n"
  "> +\n"
- "> +\t\t\t\trtic_a: rtic-a@0 {\n"
+ "> +\t\t\t\trtic_a: rtic-a at 0 {\n"
  "> +\t\t\t\t\tcompatible = \"fsl,sec-v5.4-rtic-memory\",\n"
  "> +\t\t\t\t\t\t     \"fsl,sec-v5.0-rtic-memory\",\n"
  "> +\t\t\t\t\t\t     \"fsl,sec-v4.0-rtic-memory\";\n"
  "> +\t\t\t\t\treg = <0x00 0x20 0x100 0x100>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\trtic_b: rtic-b@20 {\n"
+ "> +\t\t\t\trtic_b: rtic-b at 20 {\n"
  "> +\t\t\t\t\tcompatible = \"fsl,sec-v5.4-rtic-memory\",\n"
  "> +\t\t\t\t\t\t     \"fsl,sec-v5.0-rtic-memory\",\n"
  "> +\t\t\t\t\t\t     \"fsl,sec-v4.0-rtic-memory\";\n"
  "> +\t\t\t\t\treg = <0x20 0x20 0x200 0x100>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\trtic_c: rtic-c@40 {\n"
+ "> +\t\t\t\trtic_c: rtic-c at 40 {\n"
  "> +\t\t\t\t\tcompatible = \"fsl,sec-v5.4-rtic-memory\",\n"
  "> +\t\t\t\t\t\t     \"fsl,sec-v5.0-rtic-memory\",\n"
  "> +\t\t\t\t\t\t     \"fsl,sec-v4.0-rtic-memory\";\n"
  "> +\t\t\t\t\treg = <0x40 0x20 0x300 0x100>;\n"
  "> +\t\t\t\t};\n"
  "> +\n"
- "> +\t\t\t\trtic_d: rtic-d@60 {\n"
+ "> +\t\t\t\trtic_d: rtic-d at 60 {\n"
  "> +\t\t\t\t\tcompatible = \"fsl,sec-v5.4-rtic-memory\",\n"
  "> +\t\t\t\t\t\t     \"fsl,sec-v5.0-rtic-memory\",\n"
  "> +\t\t\t\t\t\t     \"fsl,sec-v4.0-rtic-memory\";\n"
@@ -191,7 +179,7 @@
  "> +\t\t\t};\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsec_mon: sec_mon@1e90000 {\n"
+ "> +\t\tsec_mon: sec_mon at 1e90000 {\n"
  "\n"
  "Hyphen is more preferred to be used in node name than underscore.\n"
  "\n"
@@ -204,7 +192,7 @@
  "> +\t\t\t\t     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t};\n"
  "> +\n"
- ">  \t\tdcfg: dcfg@1ee0000 {\n"
+ ">  \t\tdcfg: dcfg at 1ee0000 {\n"
  ">  \t\t\tcompatible = \"fsl,ls1012a-dcfg\",\n"
  ">  \t\t\t\t     \"syscon\";\n"
  "> -- \n"
@@ -213,7 +201,7 @@
  "> \n"
  "> _______________________________________________\n"
  "> linux-arm-kernel mailing list\n"
- "> linux-arm-kernel@lists.infradead.org\n"
+ "> linux-arm-kernel at lists.infradead.org\n"
  > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-5c248dfd6fb776f67c7e3f585a82590e8a0ad257486e98ff9656e8744b8fe495
+d3f3b8a8570c57893149a121e20a82c3130d9f05bbd76fc77f0d0f28242d01b9
