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From: Andi Kleen <ak@linux.intel.com>
To: kan.liang@intel.com
Cc: peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com,
	linux-kernel@vger.kernel.org, bp@alien8.de, acme@kernel.org,
	eranian@google.com, jolsa@kernel.org
Subject: Re: [PATCH V4 2/2] perf/x86: add sysfs entry to freeze counter on SMI
Date: Tue, 28 Mar 2017 21:18:29 -0700	[thread overview]
Message-ID: <20170329041829.GA4543@tassilo.jf.intel.com> (raw)
In-Reply-To: <1490751920-44720-3-git-send-email-kan.liang@intel.com>

> +	if (x86_pmu.attr_freeze_on_smi == val)
> +		return count;
> +
> +	mutex_lock(&freeze_on_smi_mutex);

I don't think the mutex is really needed, but if it was it would 
need to include the previous check too to be atomic.

> +
> +	get_online_cpus();
> +
> +	flip_smm_bit(&val);
> +	smp_call_function(flip_smm_bit, &val, 1);
> +
> +	put_online_cpus();

This is on_each_cpu() 

> +
> +	x86_pmu.attr_freeze_on_smi = val;
> +
> +	mutex_unlock(&freeze_on_smi_mutex);


-Andi

  reply	other threads:[~2017-03-29  4:18 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-29  1:45 [PATCH V4 0/2] measure SMI cost (kernel) kan.liang
2017-03-29  1:45 ` [PATCH V4 1/2] x86/msr: expose msr_flip_bit function kan.liang
2017-03-29  5:47   ` Thomas Gleixner
2017-03-29 13:01     ` Liang, Kan
2017-03-29  1:45 ` [PATCH V4 2/2] perf/x86: add sysfs entry to freeze counter on SMI kan.liang
2017-03-29  4:18   ` Andi Kleen [this message]
2017-03-29  6:00   ` Thomas Gleixner
2017-03-29  6:24   ` Ingo Molnar

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