From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Petazzoni Subject: Re: [PATCH 4/7] arm64: marvell: dts: add crypto engine description for 7k/8k Date: Wed, 12 Apr 2017 10:56:08 +0200 Message-ID: <20170412105608.41501b63@free-electrons.com> References: <20170329124432.27457-1-antoine.tenart@free-electrons.com> <20170329124432.27457-5-antoine.tenart@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: herbert@gondor.apana.org.au, davem@davemloft.net, jason@lakedaemon.net, andrew@lunn.ch, gregory.clement@free-electrons.com, sebastian.hesselbarth@gmail.com, linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org, boris.brezillon@free-electrons.com, oferh@marvell.com, igall@marvell.com, nadavh@marvell.com To: Antoine Tenart Return-path: Received: from mail.free-electrons.com ([62.4.15.54]:49907 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751992AbdDLI4V (ORCPT ); Wed, 12 Apr 2017 04:56:21 -0400 In-Reply-To: <20170329124432.27457-5-antoine.tenart@free-electrons.com> Sender: linux-crypto-owner@vger.kernel.org List-ID: Hello, On Wed, 29 Mar 2017 14:44:29 +0200, Antoine Tenart wrote: > + cpm_crypto: crypto@800000 { > + compatible = "inside-secure,safexcel-eip197"; > + reg = <0x800000 0x200000>; > + interrupts = , Now that I look into this, does it makes sense for an interrupt to be both an edge interrupt and a level interrupt at the same time? This looks odd. Best regards, Thomas -- Thomas Petazzoni, CTO, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com From mboxrd@z Thu Jan 1 00:00:00 1970 From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni) Date: Wed, 12 Apr 2017 10:56:08 +0200 Subject: [PATCH 4/7] arm64: marvell: dts: add crypto engine description for 7k/8k In-Reply-To: <20170329124432.27457-5-antoine.tenart@free-electrons.com> References: <20170329124432.27457-1-antoine.tenart@free-electrons.com> <20170329124432.27457-5-antoine.tenart@free-electrons.com> Message-ID: <20170412105608.41501b63@free-electrons.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hello, On Wed, 29 Mar 2017 14:44:29 +0200, Antoine Tenart wrote: > + cpm_crypto: crypto at 800000 { > + compatible = "inside-secure,safexcel-eip197"; > + reg = <0x800000 0x200000>; > + interrupts = , Now that I look into this, does it makes sense for an interrupt to be both an edge interrupt and a level interrupt at the same time? This looks odd. Best regards, Thomas -- Thomas Petazzoni, CTO, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com